Using polymer electrolyte gates to set-and-freeze threshold voltage and local potential in nanowire-based devices and thermoelectrics

We use the strongly temperature-dependent ionic mobility in polymer electrolytes to 'freeze in' specific ionic charge environments around a nanowire using a local wrap-gate geometry. This enables us to set both the threshold voltage for a conventional doped substrate gate and the local disorder potential at temperatures below 200 Kelvin, which we characterize in detail by combining conductance and thermovoltage measurements with modeling. Our results demonstrate that local polymer electrolyte gates are compatible with nanowire thermoelectrics, where they offer the advantage of a very low thermal conductivity, and hold great potential towards setting the optimal operating point for solid-state cooling applications.Comment: Published in Advanced Functional Materials. Includes colour versions of figures and supplementary informatio

InAs/MoRe hybrid semiconductor/superconductor nanowire devices

Implementing superconductors capable of proximity-inducing a large energy-gap in semiconductors in the presence of strong magnetic fields is a major goal towards applications of semiconductor/superconductor hybrid materials in future quantum information technologies. Here, we study the performance of devices consisting of InAs nanowires in electrical contact to molybdenum-rhenium (MoRe) superconducting alloys. The MoRe thin films exhibit transition temperatures ~10 K and critical fields exceeding 6 T. Normal/superconductor devices enabled tunnel spectroscopy of the corresponding induced superconductivity, which was maintained up to ~10 K, and MoRe based Josephson devices exhibit supercurrents and multiple Andreev reflections. We determine an induced superconducting gap lower than expected from the transition temperature, and observe gap softening at finite magnetic field. These may be common features for hybrids based on large gap, type-II superconductors. The results encourage further development of MoRe-based hybrids

Shadow epitaxy for in-situ growth of generic semiconductor/superconductor devices

Uniform, defect-free crystal interfaces and surfaces are crucial ingredients for realizing high-performance nanoscale devices. A pertinent example is that advances in gate-tunable and topological superconductivity using semiconductor/superconductor electronic devices are currently built on the hard proximity-induced superconducting gap obtained from epitaxial indium arsenide/aluminium heterostructures. Fabrication of devices requires selective etch processes; these exist only for InAs/Al hybrids, precluding the use of other, potentially superior material combinations. We present a crystal growth platform -- based on three-dimensional structuring of growth substrates -- which enables synthesis of semiconductor nanowire hybrids with in-situ patterned superconductor shells. This platform eliminates the need for etching, thereby enabling full freedom in choice of hybrid constituents. We realise and characterise all the most frequently used architectures in superconducting hybrid devices, finding increased yield and electrostatic stability compared to etched devices, along with evidence of ballistic superconductivity. In addition to aluminium, we present hybrid devices based on tantalum, niobium and vanadium. This is the submitted version of the manuscript. The accepted, peer reviewed version is available from Advanced Materials: http://doi.org/10.1002/adma.201908411 Previous title: Shadow lithography for in-situ growth of generic semiconductor/superconductor device

Doubling the mobility of InAs/InGaAs selective area grown nanowires

Selective area growth (SAG) of nanowires and networks promise a route toward scalable electronics, photonics, and quantum devices based on III-V semiconductor materials. The potential of high-mobility SAG nanowires however is not yet fully realised, since interfacial roughness, misfit dislocations at the nanowire/substrate interface and nonuniform composition due to material intermixing all scatter electrons. Here, we explore SAG of highly lattice-mismatched InAs nanowires on insulating GaAs(001) substrates and address these key challenges. Atomically smooth nanowire/substrate interfaces are achieved with the use of atomic hydrogen (a-H) as an alternative to conventional thermal annealing for the native oxide removal. The problem of high lattice mismatch is addressed through an InxGa1-xAs buffer layer introduced between the InAs transport channel and the GaAs substrate. The Ga-In material intermixing observed in both the buffer layer and the channel is inhibited via careful tuning of the growth temperature. Performing scanning transmission electron microscopy and x-ray diffraction analysis along with low-temperature transport measurements we show that optimized In-rich buffer layers promote high-quality InAs transport channels with the field-effect electron mobility over 10 000 cm2 V-1 s-1. This is twice as high as for nonoptimized samples and among the highest reported for InAs selective area grown nanostructures.The project was supported by Microsoft Quantum, the European Research Council (ERC) under Grant No. 716655 (HEMs-DAM), and the European Union Horizon 2020 research and innovation program under the Marie Sklodowska-Curie Grant No. 722176. The authors acknowledge Dr. Keita Ohtani for technical support and fruitful discussions. D.V.B. is grateful to Dr. Juan-Carlos Estrada Saldaña for careful reading of the manuscript. The authors thank Francesco Montalenti, Marco Albani and Leo Miglio for scientific discussions. ICN2 acknowledges funding from Generalitat de Catalunya 2017 SGR 327. ICN2 is supported by the Severo Ochoa program from Spanish MINECO (Grant No. SEV-2017-0706) and is funded by the CERCA Programme/Generalitat de Catalunya. Part of the present work has been performed in the framework of Universitat Autònoma de Barcelona Materials Science Ph.D. program. The HAADF-STEM microscopy was conducted in the Laboratorio de Microscopias Avanzadas at Instituto de Nanociencia de Aragon-Universidad de Zaragoza. M.C.S. has received funding from the European Unionâs Horizon 2020 research and innovation programme under the Marie Sklodowska-Curie Grant Agreement No. 754510 (PROBIST). The funding agency is Consejo Superior de Investigaciones Científicas (CSIC) and the project reference is “Research Platform on Quantum Technologies PTI-001”

Towards bioelectronic logic(Conference Presentation)

One of the critical tasks in realising a bioelectronic interface is the transduction of ion and electron signals at high fidelity, and with appropriate speed, bandwidth and signal-to-noise ratio [1]. This is a challenging task considering ions and electrons (or holes) have drastically different physics. For example, even the lightest ions (protons) have mobilities much smaller than electrons in the best semiconductors, effective masses are quite different, and at the most basic level, ions are ‘classical’ entities and electrons ‘quantum mechanical’. These considerations dictate materials and device strategies for bioelectronic interfaces alongside practical aspects such as integration and biocompatibility [2]. In my talk I will detail these ‘differences in physics’ that are pertinent to the ion-electron transduction challenge. From this analysis, I will summarise the basic categories of device architecture that are possibilities for transducing elements and give recent examples of their realisation. Ultimately, transducing elements need to be combined to create ‘bioelectronic logic’ capable of signal processing at the interface level. In this regard, I will extend the discussion past the single element concept, and discuss our recent progress in delivering all-solids-state logic circuits based upon transducing interfaces. [1] “Ion bipolar junction transistors”, K. Tybrandt, K.C. Larsson, A. Richter-Dahlfors and M. Berggren, Proc. Natl Acad. Sci., 107, 9929 (2010). [2] “Electronic and optoelectronic materials and devices inspired by nature”, P Meredith, C.J. Bettinger, M. Irimia-Vladu, A.B. Mostert and P.E. Schwenn, Reports on Progress in Physics, 76, 034501 (2013)

Superconductivity and Parity Preservation in As-Grown in Islands on InAs Nanowires

We report in-situ synthesis of crystalline indium islands on InAs nanowires grown by molecular beam epitaxy. Structural analysis by transmission electron microscopy showed that In crystals grew in a tetragonal body-centred crystal structure within two families of orientations relative to wurtzite InAs. The crystalline islands had lengths < 500 nm and low-energy surfaces, suggesting that growth was driven mainly by surface energy minimization. Electrical transport through In/InAs devices exhibited Cooper pair charging, evidencing charge parity preservation and a pristine In/InAs interface, with an induced superconducting gap ~ 0.45 meV. Cooper pair charging persisted to temperatures > 1.2 K and magnetic fields ~ 0.7 T, demonstrating that In/InAs hybrids belong to an expanding class of semiconductor/superconductor hybrids operating over a wider parameter space than state-of-the-art Al-based hybrids. Engineering crystal morphology while isolating single islands using shadow epitaxy provides an interesting alternative to previous semiconductor/superconductor hybrid morphologies and device geometries.Comment: Published in Nano Letters: https://pubs.acs.org/doi/10.1021/acs.nanolett.1c0248

Andreev Interference in the Surface Accumulation Layer of Half-Shell InAsSb/Al Hybrid Nanowires

Understanding the spatial distribution of charge carriers in III-V nanowires proximity coupled to superconductors is important for the design and interpretation of experiments based on hybrid quantum devices. In this letter, the gate-dependent surface accumulation layer of InAsSb/Al nanowires was studied by means of Andreev interference in a parallel magnetic field. Both uniform hybrid nanowires and devices featuring a short Josephson junction fabricated by shadow lithography, exhibited periodic modulation of the switching current. The period corresponds to a flux quantum through the nanowire diameter and is consistent with Andreev bound states occupying a cylindrical surface accumulation layer. The spatial distribution was tunable by a gate potential as expected from electrostatic models

Cryogenic multiplexing using selective area grown nanowires

Abstract Bottom-up grown nanomaterials play an integral role in the development of quantum technologies but are often challenging to characterise on large scales. Here, we harness selective area growth of semiconductor nanowires to demonstrate large-scale integrated circuits and characterisation of large numbers of quantum devices. The circuit consisted of 512 quantum devices embedded within multiplexer/demultiplexer pairs, incorporating thousands of interconnected selective area growth nanowires operating under deep cryogenic conditions. Multiplexers enable a range of new strategies in quantum device research and scaling by increasing the device count while limiting the number of connections between room-temperature control electronics and the cryogenic samples. As an example of this potential we perform a statistical characterization of large arrays of identical quantum dots thus establishing the feasibility of applying cross-bar gating strategies for efficient scaling of future selective area growth quantum circuits. More broadly, the ability to systematically characterise large numbers of devices provides new levels of statistical certainty to materials/device development