Signal generator based on a chaotic circuit

"This paper is about a signal generator based on Chua´s circuit. It is able to generate chaotic and sinusoidal signals. It can generate other types of waveforms as well. These results are seen in the experiment carried out on the signal generator. Simple hardware like operational amplifiers along with passive components such as resistors and capacitors are used to make the signal generator.

Difference map and its electronic circuit realization

"In this paper we study the dynamical behavior of the one-dimensional discrete-time system, the so-called iterated map. Namely, a bimodal quadratic map is introduced which is obtained as an amplification of the difference between well-known logistic and tent maps. Thus, it is denoted as the so-called difference map. The difference map exhibits a variety of behaviors according to the selection of the bifurcation parameter. The corresponding bifurcations are studied by numerical simulations and experimentally. The stability of the difference map is studied by means of Lyapunov exponent and is proved to be chaotic according to Devaney’s definition of chaos. Later on, a design of the electronic implementation of the difference map is presented. The difference map electronic circuit is built using operational amplifiers, resistors and an analog multiplier. It turns out that this electronic circuit presents fixed points, periodicity, chaos and intermittency that match with high accuracy to the corresponding values predicted theoretically.

Forced synchronization of autonomous dynamical Boolean networks

"We present the design of an autonomous time-delay Boolean network realized with readily available electronic components. Through simulations and experiments that account for the detailed nonlinear response of each circuit element, we demonstrate that a network with five Boolean nodes displays complex behavior. Furthermore, we show that the dynamics of two identical networks display near-instantaneous synchronization to a periodic state when forced by a common periodic Boolean signal. A theoretical analysis of the network reveals the conditions under which complex behavior is expected in an individual network and the occurrence of synchronization in the forced networks. This research will enable future experiments on autonomous time-delay networks using readily available electronic components with dynamics on a slow enough time-scale so that inexpensive data collection systems can faithfully record the dynamics.

Set-reset flip-flop circuit with a simple output logic

"The equation of the plane (EOP) in analytic geometry is used to build a logic dynamic architecture, i.e., a combination of set-reset flip-flop (SR-FF) and basic logic gates. This is achieved by using two of the variables in the EOP as the input signals of the SR-FF and the remaining variable as the output signal. This theoretical proposal for mixing the SR-FF and the basic logic gates is confirmed experimentally by means of a simple electronic implementation.

Chua´s circuit and its characterization as a filter

"This article deals with Chuaʼs circuit characterization from the point of view of a filter based on the concept of piecewise linear functions. Furthermore, experiments are developed for teaching electronic systems that can be used for novel filtering concepts. The frequency range in which they are tested is from $20\;{\rm Hz}$ to $20\;{\rm kHz}$, due to the audio spectrum comprised in this frequency range. The node associated with the capacitor and Chuaʼs diode is used as input, and the node for another capacitor and the coil is used as output, thereby establishing one input–output relationship for each system case given by the piecewise linear functions. The experimental result shows that Chuaʼs circuit behaves as a bandpass filter-amplifier, with a maximum frequency around $3\;{\rm kHz}$ and bandwidth between $1.5\;{\rm kHz}$ and $5.5\;{\rm kHz}$. The results presented in this paper can motivate engineering students to pursue applications of novel electrical circuits based on topics that are of potential interest in their future research studies.

Multivalued synchronization by Poincar coupling

"This work presents multivalued chaotic synchronization via coupling based on the Poincaré plane. The coupling is carried out by an underdamped signal, triggered every crossing event of the trajectory of the master system through a previously defined Poincaré plane. A master–slave system is explored, and the synchronization between the systems is detected via the auxiliary system approach and the maximum conditional Lyapunov exponent. Due to the response to specific conditions two phenomena may be obtained: univalued and multivalued synchronization. Since the Lyapunov exponent is not enough to detect these two phenomena, the distance between the pieces of trajectories of the slave and auxiliary systems with different initial conditions is also used as a tool for the detection of multivalued synchronization. Computer simulations using the benchmark chaotic systems of Lorenz and Rössler are used to exemplify the approach proposed.

Medida experimental y modelado matemático de módulos fotovoltaicos

En la actualidad, las celdas solares fotovoltaicas de silicio se han convertido en un medio muy utilizado para la generación de energía eléctrica. Uno de los problemas principales de estos elementos es la baja eficiencia de conversión energética y la elevada inversión inicial que se requieren para la puesta en marcha de un sistema de generación fotovoltaica. Por esta razón, es necesario realizar una estimación previa de la energía que se obtendrá a partir de los paneles en una determinada zona geográfica antes de su implementación y así apreciar la relación costo-beneficio para tomar la decisión adecuada. El presente trabajo se enfoca en la medida experimental de un módulo fotovoltaico de prueba en San Luis Potosí, con objeto de analizar y comparar el comportamiento de los diferentes modelos existentes en la literatura para las celdassolares fotovoltaicas.Palabra(s) Clave(s): celda fotovoltaica, eficiencia, irradiancia, modelado, potencia eléctrica

Grid-tied Multilevel Inverter with Phase-locked Loop Algorithm

A multilevel inverter is an electronic device capable of changing direct current energy to alternant current energy with a voltage and frequency established by the user. They are ideal for connecting renewable energy sources to the AC grid, energy plants, and smart grids. The voltage must be balanced and synchronized with the electrical network for adequate performance. This paper shows the voltage synchronization between an inverter output voltage and the AC grid using a phase-locked loop based on an adaptive observer. The proposed algorithm can perform under grid uncertainties such as noise and generates a reference signal for the modulation used in the inverter. The algorithm is robust and computationally efficient and can be implemented through basic elements such as operational amplifiers, resistors, and capacitors, reducing its difficulty in executing it in a system

Reconfigurable dynamical logic gate with linear core

"A dynamically reconfigurable linear core logic gate is a device that allows logical outputs dependent upon configurable parameters set within device. The device is comprised of three blocks: The first block receives at least one input signal and determines whether the signal o signals are low or high in comparison with a threshold reference signal. The second block sums the logic signals of the first block with an offset signal. The third block determines if the sum realized in the second block is a low or high by checking whether the sum falls within a predetermined interval.

Reconfigurable dynamical logic gate with linear core

"A dynamically reconfigurable linear core logic gate is a device that allows logical outputs dependent upon configurable parameters set within device. The device is comprised of three blocks: The first block receives at least one input signal and determines whether the signal o signals are low or high in comparison with a threshold reference signal. The second block sums the logic signals of the first block with an offset signal. The third block determines if the sum realized in the second block is a low or high by checking whether the sum falls within a predetermined interval.