Low temperature exfoliation process in hydrogen-implanted germanium layers

The feasibility of transferring hydrogen-implanted germanium to silicon with a reduced thermal budget is demonstrated. Germanium samples were implanted with a splitting dose of 5 x 10(16) H(2)(+) cm(-2) at 180 keV and a two-step anneal was performed. Surface roughness and x-ray diffraction pattern measurements, combined with cross-sectional TEM analysis of hydrogen-implanted germanium samples were carried out in order to understand the exfoliation mechanism as a function of the thermal budget. It is shown that the first anneal performed at low temperature (<= 150 degrees C for 22 h) enhances the nucleation of hydrogen platelets significantly. The second anneal is performed at 300 degrees C for 5 min and is shown to complete the exfoliation process by triggering the formation of extended platelets. Two key results are highlighted: (i) in a reduced thermal budget approach, the transfer of hydrogen-implanted germanium is found to follow a mechanism similar to the transfer of hydrogen-implanted InP and GaAs, (ii) such a low thermal budget (<300 degrees C) is found to be suitable for directly bonded heterogeneous substrates, such as germanium bonded to silicon, where different thermal expansion coefficients are involved. (C) 2010 American Institute of Physics. [doi: 10.1063/1.3326942

Comprehensive investigation of Ge-Si bonded interfaces using oxygen radical activation

In this work, we investigate the directly bonded germanium-silicon interfaces to facilitate the development of high quality germanium silicon hetero integration at the wafer scale. X-ray photoelectron spectroscopy data is presented which provides the chemical composition of the germanium surfaces as a function of the hydrophilic bonding reaction at the interface. The bonding process induced long range deformation is detected by synchrotron x-ray topography. The hetero-interface is characterized by measuring forward and reverse current, and by high resolution transmission electron microscopy. (C) 2011 American Institute of Physics. [doi: 10.1063/1.3601355

Characterization of germanium/silicon p-n junction fabricated by low temperature direct wafer bonding and layer exfoliation

The current transport across a p-Ge/n-Si diode structure obtained by direct wafer bonding and layer exfoliation is analysed. A low temperature anneal at 400 degrees C for 30 min was used to improve the forward characteristics of the diode with the on/off ratio at -1 V being > 8000. Post anneal, the transport mechanism has a strong tunnelling component. This fabrication technique using a low thermal budget (T <= 400 degrees C) is an attractive option for heterogeneous integration. (C) 2012 American Institute of Physics. (doi:10.1063/1.3688174

Low temperature germanium to silicon direct wafer bonding using free radical exposure

A low temperature germanium (Ge) to silicon (Si) wafer bonding method was demonstrated by in situ radical activation bonding in vacuum. In order to gain further insight into the bonding mechanism, the Ge surface chemistry after either oxygen or nitrogen radical activation was analyzed by means of angle-resolved x-ray photoelectron spectroscopy. After low temperature direct bonding of Ge to Si followed by annealing at 200 and 300 degrees C, advanced imaging techniques were used to characterize the bonded interface. (C) 2010 American Institute of Physics. (doi: 10.1063/1.3360201

Comparison of different surface orientation in narrow fin MuGFETs

Device performance characteristics are investigated for different surface orientation and doping concentration on accumulation-mode p-type and inversion-mode n-type MuGFETs. Short-channel effects and drain breakdown voltage are better is carrier transport is in the (1 0 0) direction than in the (1 1 0) direction. This is due to the larger Si/SiO2 interface roughness, the higher density of interface state at (1 1 0) surfaces, and to the difference of effective mass. The mobility in PMOS devices, however, is much higher in the (1 1 0) direction than that in the (1 0 0) direction. For better performance of device, our results show that optimized fin orientation can improve device stability and performance