Towards Very High Voltage SiC Power Devices

International audienceThe development of high voltage devices is a great challenge. At least, railway and high voltage distribution network are example of applications requiring high voltage devices. SiC power devices and technology seems to be mature enough to give a short term solution. Indeed, silicon carbide devices appear to be the semiconductor of choice for high voltage (> 6.5 kV) applications compared to Gallium Nitride and Diamond. For high voltage devices, periphery protection is mandatory in order to reduce the well-known electric field crowding taking place at the junction edge. Some details are given about the different periphery technics (JTE, guard rings, MESA) applied to SiC devices, before combining some of them to reach higher and higher breakdown voltages. Some works remaining to be done are given as a conclusion of this paper

3D TCAD Simulations for More Efficient SiC Power Devices Design

International audienceSiC devices become more and more prominent in the power semiconductor industry. Thanks to a technology that seems to be mature enough, SiC devices become more and more sophisticated. Therefore, they can be serious competitors to existing silicon devices in not so distant future at least for high temperature and high power applications. In addition to undoubtedly better electrical and thermal properties, SiC devices still require attention regarding their design. Indeed, the material is still more expensive than silicon and some limitations such as the inability to create deep p-n junctions prevent from re-using existing silicon design. Therefore, SiC devices should be designed so that the best trade-off between active area and breakdown voltage is achieved. In such a context, 3D TCAD can be become an interesting approach mostly thanks to modern computer farms

P-type SiC layers formed by VLS induced selective epitaxial growth

International audienceUnipolar SiC devices like Schottky diodes, MESFET and JFET are already or will be soon commercialized. Different universities or industrial research teams have published a non-negligible number of bipolar device demonstrators in SiC. Nevertheless large efforts were mainly targeted in increasing the breakdown voltage. Results on 19.5kV bipolar diodes were published [1]. In spite of that, the development of SiC bipolar devices is slowed down due to the low currents which are obtained in forward polarization. This is due firstly to the material quality which limits the device area and secondly to the high resistances of the SiC p-type layers and the ohmic contacts on these layers. Diminishing the SiC p-type layers resistance is difficult by classical process due to the solubility limit of dopants during the CVD epitaxy [2] or the material degradation by ion implantation at high doses. Partial material recovery and dopant activation are obtained after high temperature post-implantation annealing (1700 – 1800°C). In this paper we present SiC p-type material selectively grown at relatively low temperature process by Vapour-Liquid-Solid (VLS)

Understanding the growth of p-doped 4H-SiC layers using vapour–liquid–solid transport

International audienceThe present study reports the fabrication of localized p-doped silicon carbide zones on 4H-SiC substrate. Selective epitaxial growth of p-doped SiC was performed using the vapour–liquid–solid transport in Al–Si liquid phase. Focus was made on the understanding of the mechanism involved during such growth. It was shown that despite the need of starting the growth during the heating ramp, the deposition proceeds in a 2D manner at low temperature. Rather high growth rates were obtained (56.7–380 nm/min) which are related to the thinness of the liquid phase (< 3 μm). Argon carrier gas leads to an increase of growth rate compared to H2 due to the reducing effect of this latter gas. The results revealed that the surface morphology was more affected by the initial Si content of the liquid than by the growth rate. It is proposed that the Si content of the liquid is a very influent parameter because of its importance in the competition between SiC or Al4C3 stabilization

Influence of process parameters on electrical properties of PiN diodes fabricated with a highly p-type doped layer selectively grown by VLS transport

International audienceSiC Selective Epitaxial Growth (SEG) by Vapor-Liquid-Solid (VLS) transport on a bowl-shaped geometry appears to be a promising solution to perform deep, highly doped and high quality p-type doped area. Such SEG-VLS growth of highly p-doped (> 5x1019 cm-3) SiC layer was successfully demonstrated recently on large and small areas fabricated by Reactive Ion Etching (RIE). Moreover, a high quality P++(VLS)-N junction can be achieved by using this technique that offer new prospects for the achievement of new power electronics devices, including deeply buried peripheral protection zones such as guard-rings or JBS structures

Applications of Vapor-Liquid-Solid Selective Epitaxy of Highly p-type Doped 4H-SiC: PiN Diodes with Peripheral Protection and Improvement of Specific Contact Resistance of Ohmic Contacts

International audienc