Geographic variation in the PRNP gene and its promoter, and their relationship to chronic wasting disease in North American deer

PRNP genotypes, number of octarepeats (PHGGGWGQ) and indels in the PRNP promoter can influence the progression of prion disease in mammals. We found no relationship between presence of promoter indels in white-tailed deer and mule deer from Nebraska and CWD presence. White-tailed deer with the 95 H allele and G20D mule deer were more likely to be CWD- free, but unlike other studies white-tailed deer with the 96S allele(s) were equally likely to be CWD-free. We provide the first information on PRNP genotypes and indels in the promoter for Key deer (all homozygous 96SS) and Coues deer (lacked 95 H and 96S alleles, but possessed a uniquely high frequency of 103 T). All deer surveyed were homozygous for three tandem octarepeats

Observing the Observer (I): Meta-Bayesian Models of Learning and Decision-Making

In this paper, we present a generic approach that can be used to infer how subjects make optimal decisions under uncertainty. This approach induces a distinction between a subject's perceptual model, which underlies the representation of a hidden "state of affairs" and a response model, which predicts the ensuing behavioural (or neurophysiological) responses to those inputs. We start with the premise that subjects continuously update a probabilistic representation of the causes of their sensory inputs to optimise their behaviour. In addition, subjects have preferences or goals that guide decisions about actions given the above uncertain representation of these hidden causes or state of affairs. From a Bayesian decision theoretic perspective, uncertain representations are so-called "posterior" beliefs, which are influenced by subjective "prior" beliefs. Preferences and goals are encoded through a "loss" (or "utility") function, which measures the cost incurred by making any admissible decision for any given (hidden) state of affair. By assuming that subjects make optimal decisions on the basis of updated (posterior) beliefs and utility (loss) functions, one can evaluate the likelihood of observed behaviour. Critically, this enables one to "observe the observer", i.e. identify (context-or subject-dependent) prior beliefs and utility-functions using psychophysical or neurophysiological measures. In this paper, we describe the main theoretical components of this meta-Bayesian approach (i.e. a Bayesian treatment of Bayesian decision theoretic predictions). In a companion paper ('Observing the observer (II): deciding when to decide'), we describe a concrete implementation of it and demonstrate its utility by applying it to simulated and real reaction time data from an associative learning task

RF Modems for Personal Communications Systems

Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Part 1 Infopad CDMA Downlink Modem . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Wideband Digital Portable Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Sam Sheng, Robert W. Brodersen 1.2 Low-Power Analog-Digital Conversion for Spread-Spectrum Communications. . . 9 Lapoe Lynn, Ian O'Donnell, Robert W. Brodersen 1.3 Architecture and Design of CDMA Modem Symbol Detector/Demodulator . . . . 11 Kevin M. Stone, Ian O'Donnell, Sam Sheng, and Robert W. Brodersen 1.4 Low-Power High-S38peed Analog Techniques for Spread Spectrum Baseband Recovery Circuits13 Keith Onodera and Paul R. Gray 1.5 Commercial Radio Implementation of InfoPad Downlink and Uplink . . . . . . . . . . 14 Craig Teuscher, Dennis Yee, Robert W. Brodersen&lt

An automated floating-point to fixed-point conversion methodology

Most existing analyses of quantization effects are given under the condition that all decision-making blocks, if exist in a system, produce identical decisions in both fixed-point and infinite-precision (IP) implementations. However, in doing floating-point to fixed-point conversion (FFC), a fixed-point design with occasional such decision errors may still be an acceptable approximation of the IP system. We study the effect of this decision error, and relate its probability to the fixedpoint data types. Our previous FFC methodology is then extended to include systems with possible decision errors due to quantization. The analysis is applied to both CORDIC and BPSK transceiver. 1

DSP Architecture Design Essentials

In DSP Architecture Design Essentials, authors Dejan Marković and Robert W. Brodersen cover a key subject for the successful realization of DSP algorithms for communications, multimedia, and healthcare applications. The book addresses the need for DSP architecture design that maps advanced DSP algorithms to hardware in the most power- and area-efficient way. The key feature of this text is a design methodology based on a high-level design model that leads to hardware implementation with minimum power and area. The methodology includes algorithm-level considerations such as automated word-length reduction and intrinsic data properties that can be leveraged to reduce hardware complexity. From a high-level data-flow graph model, an architecture exploration methodology based on linear programming is used to create an array of architectural solutions tailored to the underlying hardware technology. The book is supplemented with online material: bibliography, design examples, CAD tutorials and custom software

Statistical method for floating-point to fixed-point conversion

The algorithms used by communication, voice and image processing systems are typically specified as floating point operations. On the other hand, digital ASIC VLSI implementations of these algorithms rely on fixed-point approximations to reduce cost of hardware while increasing throughput rates. The essential design step of floating-point to fixed-point conversion (FFC) proves to be time consuming due to the nonlinear characteristics and the massive design optimization space. In the bid to achieve short product cycles, the execution of FFC is often left to hardware designers, who are familiar with VLSI constraints. The group often has less insight to the algorithm; thus they depend on an ad-hoc approach to evaluate the implications of fixed-point representations. The gap between algorithm and hardware design is aggravated as algorithms continue to become ever more complex. Thus a systematic method for FFC is urgently called for. Current methods for FFC employed in industry are lack of theoretical foundation and become intolerably slow when searching space is large. In our research, a solid statistical framework of the problem is established, as needed for a reliable FFC. In this framework, input signals are modeled as random process with parametric PDF; output signals are modeled as PDF with the same input parameters plus the hardware description parameters such as architectures and word lengths