Low temperature back-surface-field contacts deposited by hot-wire CVD for heterojunction solar cells

The growing interest in using thinner wafers (< 200 µm) requires the development of low temperature passivation strategies for the back contact of heterojunction solar cells. In this work, we investigate low temperature deposited back contacts based on boron-doped amorphous silicon films obtained by Hot-Wire CVD. The influence of the deposition parameters and the use of an intrinsic buffer layer have been considered. The microstructure of the deposited thin films has been comprehensively studied by Spectroscopic Ellipsometry in the UV–visible range. The effective recombination velocity at the back surface has been measured by the Quasi-Steady-State Photoconductance technique. Complete double-side heterojunction solar cells (1 cm2) have been fabricated and characterized by External Quantum Efficiency and current–voltage measurements. Total-area conversion efficiencies up to 14.5% were achieved in a fully low temperature process (< 200 °C).Peer ReviewedPostprint (author's final draft

Analysis of bias stress on thin-film transistors obtained by Hot-Wire Chemical Vapour Deposition

The stability under gate bias stress of unpassivated thin film transistors was studied by measuring the transfer and output characteristics at different temperatures. The active layer of these devices consisted of in nanocrystalline silicon deposited at 125°C by Hot-Wire Chemical Vapour Deposition. The dependence of the subthreshold activation energy on gate bias for different gate bias stresses is quite different from the one reported for hydrogenated amorphous silicon. This behaviour has been related to trapped charge in the active layer of the thin film transistor.Peer ReviewedPostprint (published version

Development of laser-fired contacts for amorphous silicon layers obtained by Hot-Wire CVD

In this work we study aluminium laser-fired contacts for intrinsic amorphous silicon layers deposited by Hot-Wire CVD. This structure could be used as an alternative low temperature back contact for rear passivated heterojunction solar cells. An infrared Nd:YAG laser (1064 nm) has been used to locally fire the aluminium through the thin amorphous silicon layers. Under optimized laser firing parameters, very low specific contact resistances (¿c ~ 10 mO cm2) have been obtained on 2.8 O cm p-type c-Si wafers. This investigation focuses on maintaining the passivation quality of the interface without an excessive increase in the series resistance of the device.Peer Reviewe

Optoelectronic properties of CuPc thin films deposited at different substrate temperatures

Structural and optical characterization of copper phthalocyanine thin film thermally deposited at different substrate temperatures was the aim of this work. The morphology of the films shows strong dependence on temperature, as can be observed by atomic force microscopy and x-ray diffraction spectroscopy, specifically in the grain size and features of the grains. The increase in the crystal phase with substrate temperature is shown by x-ray diffractometry. Optical absorption coefficient measured by photothermal deflection spectroscopy and optical transmittance reveal a weak dependence on the substrate temperature. Besides, the electro-optical response measured by the external quantum efficiency of Schottky ITO/CuPc/Al diodes shows an optimized response for samples deposited at a substrate temperature of 60¿°C, in correspondence to the I–V diode characteristics.Peer Reviewe

Bifacial heterojunction silicon solar cells by Hot-Wire CVD with open circuit voltage exceeding 600 mV

Double-sided (bifacial) heterojunction silicon solar cells have been fabricated by Hot-Wire CVD on both p- and n-type crystalline silicon substrates. In these devices, doped microcrystalline silicon layers are combined with thin intrinsic amorphous silicon buffers. Such heterojunction with intrinsic thin layer concept is applied to obtain both the low temperature deposited emitter and back surface field contact. Especially remarkable is the performance of the solar cell fabricated on p-type c-Si. This device yields a total area (1.4 cm2) conversion efficiency of 13.3%, with an open-circuit voltage of 619 mV, short-circuit current density of 29.0 mA cm- 2 and fill factor of 74.1%. The substrate temperature is kept below 200 °C during the whole fabrication process.Peer ReviewedPostprint (published version

Compositional influence on the electrical performance of zinc indium tin oxide transparent thin-film transistors

In this work, zinc indium tin oxide layers with different compositions are used as the active layer of thin film transistors. This multicomponent transparent conductive oxide is gaining great interest due to its reduced content of the scarce indium element. Experimental data indicate that the incorporation of zinc promotes the creation of oxygen vacancies, which results in a higher free carrier density. In thin-film transistors this effect leads to a higher off current and threshold voltage values. The field-effect mobility is also strongly degraded, probably due to coulomb scattering by ionized defects. A post deposition annealing in air reduces the density of oxygen vacancies and improves the field-effect mobility by orders of magnitude. Finally, the electrical characteristics of the fabricated thin-film transistors have been analyzed to estimate the density of states in the gap of the active layers. These measurements reveal a clear peak located at 0.3 eV from the conduction band edge that could be attributed to oxygen vacancies. (C) 2013 Elsevier B.V. All rights reserved

Intermediate amorphous silicon layer for crystalline silicon passivation with alumina

The passivation of silicon surfaces is required to reach high-efficiency with most of modern solar cell device structures. It has been demonstrated that the deposition of charged dielectric layers such a-SiNx:H or Al2O3 on the silicon surface is an efficient passivation technology. In particular, the Al2O3 material is efficient to passivate p-type silicon surfaces, providing lifetimes greater than 1 ms for those with layers deposited by the ALD technique. Other deposition techniques, like magnetron sputtering, have not succeeded to provide this level of passivation, probably due to the damage caused on the silicon wafer surface by the high-energy deposition process. As a solution, we assume that an intrinsic a-Si:H very thin interlayer can serve both as a physical protection layer and as a source of hydrogen atoms for surface chemical passivation. In this regard, we have developed a new approach based on the use of an intrinsic a-Si:H interlayer between the silicon wafer and the 50-nm thick passivation layer of amorphous Al2O3 deposited by sputtering. The results, obtained by QSSPC measurements, demonstrated effective lifetimes in the range of 1-2 ms for both n-type and p-type float zone silicon wafers covered with the a-Si:H/Al2O3 passivation layers and after an annealing process at 350 °C.Peer ReviewedPostprint (published version

Intermediate amorphous silicon layer for crystalline silicon passivation with alumina

The passivation of silicon surfaces is required to reach high-efficiency with most of modern solar cell device structures. It has been demonstrated that the deposition of charged dielectric layers such a-SiNx:H or Al2O3 on the silicon surface is an efficient passivation technology. In particular, the Al2O3 material is efficient to passivate p-type silicon surfaces, providing lifetimes greater than 1 ms for those with layers deposited by the ALD technique. Other deposition techniques, like magnetron sputtering, have not succeeded to provide this level of passivation, probably due to the damage caused on the silicon wafer surface by the high-energy deposition process. As a solution, we assume that an intrinsic a-Si:H very thin interlayer can serve both as a physical protection layer and as a source of hydrogen atoms for surface chemical passivation. In this regard, we have developed a new approach based on the use of an intrinsic a-Si:H interlayer between the silicon wafer and the 50-nm thick passivation layer of amorphous Al2O3 deposited by sputtering. The results, obtained by QSSPC measurements, demonstrated effective lifetimes in the range of 1-2 ms for both n-type and p-type float zone silicon wafers covered with the a-Si:H/Al2O3 passivation layers and after an annealing process at 350 °C.Peer Reviewe

Bifacial heterojunction silicon solar cells by Hot-Wire CVD with open circuit voltage exceeding 600 mV

Double-sided (bifacial) heterojunction silicon solar cells have been fabricated by Hot-Wire CVD on both p- and n-type crystalline silicon substrates. In these devices, doped microcrystalline silicon layers are combined with thin intrinsic amorphous silicon buffers. Such heterojunction with intrinsic thin layer concept is applied to obtain both the low temperature deposited emitter and back surface field contact. Especially remarkable is the performance of the solar cell fabricated on p-type c-Si. This device yields a total area (1.4 cm2) conversion efficiency of 13.3%, with an open-circuit voltage of 619 mV, short-circuit current density of 29.0 mA cm- 2 and fill factor of 74.1%. The substrate temperature is kept below 200 °C during the whole fabrication process.Peer Reviewe

Low temperature back-surface-field contacts deposited by hot-wire CVD for heterojunction solar cells

The growing interest in using thinner wafers (< 200 µm) requires the development of low temperature passivation strategies for the back contact of heterojunction solar cells. In this work, we investigate low temperature deposited back contacts based on boron-doped amorphous silicon films obtained by Hot-Wire CVD. The influence of the deposition parameters and the use of an intrinsic buffer layer have been considered. The microstructure of the deposited thin films has been comprehensively studied by Spectroscopic Ellipsometry in the UV–visible range. The effective recombination velocity at the back surface has been measured by the Quasi-Steady-State Photoconductance technique. Complete double-side heterojunction solar cells (1 cm2) have been fabricated and characterized by External Quantum Efficiency and current–voltage measurements. Total-area conversion efficiencies up to 14.5% were achieved in a fully low temperature process (< 200 °C).Peer Reviewe