Emulator Circuits and Resistive Switching Parameters of Memristor

Chua predicted the existence of the fundamental circuit element, which provides the linkage of flux (ϕ) and charge (q). The new circuit element that is called memristor (memory + resistor) was demonstrated by Hewlett Packard (HP) researchers in 2008. Researchers focused on memristor fabrication, modeling, and its application with other circuit elements. Researchers could not find the commercially memristor devices in the market because of some fabrication difficulties. For this reason, researchers focused on the memristor modeling to analyze its characteristics with other circuit elements. This chapter presents a review of the general information of memristor and its device parameters. The chapter is continued with the details of memristor mathematical and SPICE models and memristor emulators based on the other circuit elements

FCS Based Memristor Emulator with Associative Learning Circuit Application

In this paper, new fully floating memristor emulator circuit that consumes ultra-low energy is presented. This proposed circuit is simple because of the fact that it doesn't contain any multiplication or various block circuits to obtain nonlinear characteristics of memristor. Transistors are operated in subthreshold region to obtain the non-linear behavior. Floating Current Source (FCS) is used in memristor emulator design to decrease the energy consumption of emulator. Associative learning is a type of the learning mechanisms and designed memristor are used in classical associative learning circuit successfully. All results are compatible with both memristor characteristics and learning mechanisms of circuit

Floating memristor emulator with subthreshold region

Memristor which is recently discovered and known as missing circuit element is an important for memory, nonlinear and neuromorphic circuit designs. Modeling of memristor devices is essential for memristor based circuit design. In this paper, compact memristor which has high memristance value is introduced. The simulations are completed in LTspice program and expected results are obtained applying sinusoidal. Two memristor emulators are connected in serial, in parallel and promising results presented. The simulation results of applying positive pulse train to both of terminals of memristor are showed. The simulations of the proposed emulator showed the expected memristor characteristics

Neuristor based electronically controllable logic gates

This paper presents electronically controllable neuron circuit-neuristor- based logic OR and AND gates using the same circuit topology. Here, only four neuristors are used to obtain both OR and AND gates which have three inputs and one output. The proposed circuit is electronically controllable and can be used as an OR or AND gate by changing only one voltage source without changing any circuit topology. All simulation results are obtained as expected from the electronically controllable logic gates based on the neuristor which composed of memristor

Memristor emulator with spike-timing-dependent-plasticity

A novel fully floating memristor circuit that accounts for the Spike Timing-Dependent Plasticity (STOP) mechanism is presented in this paper. This proposed circuit does not need any multiplier or extra circuit blocks to provide non-linear characteristics and transistors, which are operated in subthreshold region. We show that memristor circuit exhibits pinched-hysteresis loop in the V-I plane when driven by any sinusoidal voltage source. We demonstrate that the conductance change of the proposed floating memristor exhibits STDP behavior after the application of a pulse-pair train. Finally we present that the time constant of the STDP learning window can be controlled using only one parameter. Proposed memristor emulator circuit that accounts for STDP characteristics is compatible with VLSI systems. (C) 2016 Elsevier GmbH. All rights reserved

FCS Based Memristor Emulator with Associative Learning Circuit Application

In this paper, new fully floating memristor emulator circuit that consumes ultra-low energy is presented. This proposed circuit is simple because of the fact that it doesn't contain any multiplication or various block circuits to obtain nonlinear characteristics of memristor. Transistors are operated in subthreshold region to obtain the non-linear behavior. Floating Current Source (FCS) is used in memristor emulator design to decrease the energy consumption of emulator. Associative learning is a type of the learning mechanisms and designed memristor are used in classical associative learning circuit successfully. All results are compatible with both memristor characteristics and learning mechanisms of circuit

A spiking and bursting neuron circuit based on memristor

In this paper, we propose two emulator circuits. Firstly, we present a novel memristor emulator based on operational transconductance amplifier (OTA) which is different from classical TiO2 memristor. This memristor emulator has a threshold switching mechanism. Secondly, we create a novel neuron circuit using proposed memristor, which is capable of generating spiking and bursting firing behaviors, with a biologically plausible spike shapes. The behavior of this neuron circuit can be adjusted by changing only one external biasing voltage. This neuron circuit mimics the behavior of cortical neurons, such as regular spiking (RS), intrinsic bursting (IB), chattering (CH) and fast spiking (FS). Proposed emulator circuits are compatible with. VLSI systems and they can also be implemented by using discrete circuit components for different applications. (C) 2016 Elsevier B.V. All rights reserved

Memristive retinomorphic grid architecture removing noise and preserving edge

In this paper, special memristor circuit and memristive retina network structure for analogue image processing have been presented. The new developments on memristor element have opened various possibilities due to its being in nano-scale and having nonlinear behavior. The proposed memristor emulator consists of only one Operational Transconductance Amplifier (OTA) and two MOS transistors which are operated in sub-threshold region. The memristor fuse structure is obtained by connecting two proposed memristor emulators. In the second section of our paper, we proposed a circuit block which is composed of 16 x 16 pixels retinomorphic memristive grid to maintain a smoothed and edges preserved image. All simulation results for both proposed memristor circuits and retinomorphic grid are obtained as expected. (C) 2018 Elsevier GmbH. All rights reserved