466 research outputs found

    Depletion isolation effect in Vertical MOSFETS during transition from partial to fully depleted operation

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    A simulation study is made of floating-body effects (FBEs) in vertical MOSFETs due to depletion isolation as the pillar thickness is reduced from 200 to 10 nm. For pillar thicknesses between 200–60 nm, the output characteristics with and without impact ionization are identical at a low drain bias and then diverge at a high drain bias. The critical drain bias Vdc for which the increased drain–current is observed is found to decrease with a reduction in pillar thickness. This is explained by the onset of FBEs at progressively lower values of the drain bias due to the merging of the drain depletion regions at the bottom of the pillar (depletion isolation). For pillar thicknesses between 60–10 nm, the output characteristics show the opposite behavior, namely, the critical drain bias increases with a reduction in pillar thickness. This is explained by a reduction in the severity of the FBEs due to the drain debiasing effect caused by the elevated body potential. Both depletion isolation and gate–gate coupling contribute to the drain–current for pillar thicknesses between 100–40 nm

    Asymmetric gate induced drain leakage and body leakage in vertical MOSFETs with reduced parasitic capacitance

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    Vertical MOSFETs, unlike conventional planar MOSFETs, do not have identical structures at the source and drain, but have very different gate overlaps and geometric configurations. This paper investigates the effect of the asymmetric source and drain geometries of surround-gate vertical MOSFETs on the drain leakage currents in the OFF-state region of operation. Measurements of gate-induced drain leakage (GIDL) and body leakage are carried out as a function of temperature for transistors connected in the drain-on-top and drain-on-bottom configurations. Asymmetric leakage currents are seen when the source and drain terminals are interchanged, with the GIDL being higher in the drain-on-bottom configuration and the body leakage being higher in the drain-on-top configuration. Band-to-band tunneling is identified as the dominant leakage mechanism for both the GIDL and body leakage from electrical measurements at temperatures ranging from ?50 to 200?C. The asymmetric body leakage is explained by a difference in body doping concentration at the top and bottom drain–body junctions due to the use of a p-well ion implantation. The asymmetric GIDL is explained by the difference in gate oxide thickness on the vertical (110) pillar sidewalls and the horizontal (100) wafer surface

    Improved drive current in RF vertical MOSFETS using hydrogen anneal

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    This letter reports a study on the effect of a hydrogen anneal after silicon pillar etch of surround-gate vertical MOSFETs intended for RF applications. A hydrogen anneal at 800 ?C is shown to give a 30% improvement in the drive current of 120-nm n-channel transistors compared with transistors without the hydrogen anneal. The value of drive current achieved is 250 ?A/?m, which is a record for thick pillar vertical MOSFETs. This improved performance is obtained even though a sacrificial oxidation was performed prior to the hydrogen anneal to smooth the pillar sidewall. The values of subthreshold slope and DIBL are 79 mV/decade and 45 mV/V, respectively, which are significantly better than most values reported in the literature for comparable devices. The H2 anneal is also shown to decrease the OFF-state leakage current by a factor of three

    Self-aligned silicidation of surround gate vertical MOSFETs for low cost RF applications

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    We report for the first time a CMOS-compatible silicidation technology for surround-gate vertical MOSFETs. The technology uses a double spacer comprising a polysilicon spacer for the surround gate and a nitride spacer for silicidation and is successfully integrated with a Fillet Local OXidation (FILOX) process, which thereby delivers low overlap capacitance and high drive-current vertical devices. Silicided 80-nm vertical n-channel devices fabricated using 0.5-?m lithography are compared with nonsilicided devices. A source–drain (S/D) activation anneal of 30 s at 1100 ?C is shown to deliver a channel length of 80 nm, and the silicidation gives a 60% improvement in drive current in comparison with nonsilicided devices. The silicided devices exhibit a subthreshold slope (S) of 87 mV/dec and a drain-induced barrier lowering (DIBL) of 80 mV/V, compared with 86 mV/dec and 60 mV/V for nonsilicided devices. S-parameter measurements on the 80-nm vertical nMOS devices give an fT of 20 GHz, which is approximately two times higher than expected for comparable lateral MOSFETs fabricated using the same 0.5-?m lithography. Issues associated with silicidation down the pillar sidewall are investigated by reducing the activation anneal time to bring the silicided region closer to the p-n junction at the top of the pillar. In this situation, nonlinear transistor turn-on is observed in drain-on-top operation and dramatically degraded drive current in source-on-top operation. This behavior is interpreted using mixed-mode simulations, which show that a Schottky contact is formed around the perimeter of the pillar when the silicided contact penetrates too close to the top S/D junction down the side of the pillar

    Effects of augmented exercise therapy time after stroke: a meta-analysis

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    <p><b>Background and Purpose:</b> To present a systematic review of studies that addresses the effects of intensity of augmented exercise therapy time (AETT) on activities of daily living (ADL), walking, and dexterity in patients with stroke.</p> <p><b>Summary of Review:</b> A database of articles published from 1966 to November 2003 was compiled from MEDLINE, CINAHL, Cochrane Central Register of Controlled Trials, PEDro, DARE, and PiCarta using combinations of the following key words: stroke, cerebrovascular disorders, physical therapy, physiotherapy, occupational therapy, exercise therapy, rehabilitation, intensity, dose–response relationship, effectiveness, and randomized controlled trial. References presented in relevant publications were examined as well as abstracts in proceedings. Studies that satisfied the following selection criteria were included: (1) patients had a diagnosis of stroke; (2) effects of intensity of exercise training were investigated; and (3) design of the study was a randomized controlled trial (RCT). For each outcome measure, the estimated effect size (ES) and the summary effect size (SES) expressed in standard deviation units (SDU) were calculated for ADL, walking speed, and dexterity using fixed and random effect models. Correlation coefficients were calculated between observed individual effect sizes on ADL of each study, additional time spent on exercise training, and methodological quality. Cumulative meta-analyses (random effects model) adjusted for the difference in treatment intensity in each study was used for the trials evaluating the effects of AETT provided. Twenty of the 31 candidate studies, involving 2686 stroke patients, were included in the synthesis. The methodological quality ranged from 2 to 10 out of the maximum score of 14 points. The meta-analysis resulted in a small but statistically significant SES with regard to ADL measured at the end of the intervention phase. Further analysis showed a significant homogeneous SES for 17 studies that investigated effects of increased exercise intensity within the first 6 months after stroke. No significant SES was observed for the 3 studies conducted in the chronic phase. Cumulative meta-analysis strongly suggests that at least a 16-hour difference in treatment time between experimental and control groups provided in the first 6 months after stroke is needed to obtain significant differences in ADL. A significant SES supporting a higher intensity was also observed for instrumental ADL and walking speed, whereas no significant SES was found for dexterity.</p> <p><b>Conclusion:</b> The results of the present research synthesis support the hypothesis that augmented exercise therapy has a small but favorable effect on ADL, particularly if therapy input is augmented at least 16 hours within the first 6 months after stroke. This meta-analysis also suggests that clinically relevant treatment effects may be achieved on instrumental ADL and gait speed.</p&gt

    Polycrystalline silicon-germanium emitters for gain control, with application to SiGe HBTs

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    Design of 50-nm Vertical MOSFET Incorporating a Dielectric Pocket

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    Measuring the Quantum State of a Large Angular Momentum

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    We demonstrate a general method to measure the quantum state of an angular momentum of arbitrary magnitude. The (2F+1) x (2F+1) density matrix is completely determined from a set of Stern-Gerlach measurements with (4F+1) different orientations of the quantization axis. We implement the protocol for laser cooled Cesium atoms in the 6S_{1/2}(F=4) hyperfine ground state and apply it to a variety of test states prepared by optical pumping and Larmor precession. A comparison of input and measured states shows typical reconstruction fidelities of about 0.95.Comment: 4 pages, 6 figures, submitted to PR

    Effect of Phosphate Buffered Saline Solutions on Top-Down Fabricated ZnO Nanowire Field Effect Transistor

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    ZnO based nanowire FETs have been fabricated by implementing a top-down approach, which uses optical photolithography, atomic layer deposition (ALD) of ZnO thin film, and anisotropic plasma etching. The effects of Phosphate Buffered Saline (PBS) solution on the surface of ZnO nanowire were investigated by measuring the FET characteristics at different PBS dilutions. The drain current, ION, exhibited an increase of 39 times in the highest PBS solution concentration compared to measurement in air. From the measured transfer characteristics and output characteristics in various PBS dilutions, the device was found to maintain n-type behaviour. These results indicate that the device can be effectively used for biomolecules sensing
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