9 research outputs found

    Deducing the apparent flat-band position Vafb and the doping level of large area single layer graphene MOS capacitors

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    © 2015 Elsevier B.V. All rights reserved. A capacitance-voltage (CV) study on large area CVD single layer graphene MOS capacitors has been carried out. The CV features are carefully examined to reveal the electronic origins of the observed frequency and bias dependence. In this study we investigate the frequency dispersion, propose the definition and extraction of the apparent flat-band Vafb, and finally perform the low temperature CV measurement to deduce the doping level of the graphene MOSCAPs.publisher: Elsevier articletitle: Deducing the apparent flat-band position Vafb and the doping level of large area single layer graphene MOS capacitors journaltitle: Microelectronic Engineering articlelink: http://dx.doi.org/10.1016/j.mee.2015.04.104 content_type: article copyright: Copyright © 2015 Elsevier B.V. All rights reserved.status: publishe

    Insight on the Characterization of MoS2 Based Devices and Requirements for Logic Device Integration

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    © The Author(s) 2016. Published by ECS All rights reserved. MoS2 based transistors are being explored as a promising candidate for different applications. The techniques employed to characterize these devices have been directly adapted from 3D semiconductors, without considering the validity of the assumptions. In this work, we discuss the limitations of two-probe (2P), four probe (4P) and transfer length methods (TLM) for extracting electrical parameters. Based on finite-element modeling, we provide design considerations for 4P structures to measure more accurately. Extracting the parameters from these techniques in the appropriate regimes, we identify contact resistance RC to be critical for scaled MoS2 devices. Using 4P and TLM measurements along with temperature dependent measurements, we derive further insights into the behavior of the RC in the subthreshold and linear regime. Additionally, we propose an empirical model for the on-state contact resistance.status: publishe

    Relation between film thickness and surface doping of MoS2 based field effect transistors

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    Ultra-thin MoS2 film doping through surface functionalization with physically adsorbed species is of great interest due to its ability to dope the film without reduction in the carrier mobility. However, there is a need for understanding how the thickness of the MoS2 film is related to the induced surface doping for improved electrical performance. In this work, we report on the relation of MoS2 film thickness with the doping effect induced by the n-dopant adsorbate poly(vinyl-alcohol). Field effect transistors built using MoS2 films of different thicknesses were electrically characterized, and it was observed that the ION/OFF ratio after doping in thin films is more than four orders of magnitudes greater when compared with thick films. Additionally, a semi-classical model tuned with the experimental devices was used to understand the spatial distribution of charge in the channel and explain the observed behavior. From the simulation results, it was revealed that the two-dimensional carrier density induced by the adsorbate is distributed rather uniformly along the complete channel for thin films (<5.2 nm) contrary to what happens for thicker films

    From the metal to the channel: a study of carrier injection through the metal/2D MoSâ‚‚ interface

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    Despite the fact that two-dimensional MoS2 films continue to be of interest for novel device concepts and beyond silicon technologies, there is still a lack of understanding on the carrier injection at metal/MoS2 interface and effective mitigation of the contact resistance. In this work, we develop a semi-classical model to identify the main mechanisms and trajectories for carrier injection at MoS2 contacts. The proposed model successfully captures the experimentally observed contact behavior and the overall electrical behavior of MoS2 field effect transistors. Using this model, we evaluate the injection trajectories for different MoS2 thicknesses and bias conditions. We find for multilayer (>2) MoS2, the contribution of injection at the contact edge and injection under the contact increase with lateral and perpendicular fields, respectively. Furthermore, we identify that the carriers are predominantly injected at the edge of the contact metal for monolayer and bilayer MoS2. Following these insights, we have found that the transmission line model could significantly overestimate the transfer length and hence the contact resistivity for monolayer and bilayer MoS2. Finally, we evaluate different contact strategies to improve the contact resistance considering the limiting injection trajectory.status: publishe

    MoS2 Functionalization with a Sub-nm Thin SiO2 Layer for Atomic Layer Deposition of High-k Dielectrics

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    © 2017 American Chemical Society. Several applications of two-dimensional (2D) semiconducting transition metal dichalcogenides (TMDs) in nanoelectronic devices require the deposition of ultrathin pinhole free high-γ dielectric films on 2D TMDs. However, deposition of nm-thin high-γ dielectric films on 2D TMDs remains challenging due to the inert TMD surface. Here, we demonstrate that the surface of a synthetic polycrystalline 2D MoS2 film is functionalized with SiO2 to enable the atomic layer deposition (ALD) of thin and continuous Al2O3 and HfO2 layers. The origins of nucleation, the growth mode, and layer coalescence process have been investigated by complementary physical characterization techniques, which can determine the chemical bonds, absolute amount, and surface coverage of the deposited material. SiO2 is prepared by oxidizing physical vapor deposited Si in air. The surface hydrophilicity of MoS2 significantly increases after SiO2 functionalization owing to the presence of surface hydroxyl groups. SiO2 layers with a Si content of only 1.5 × 1015 atoms/cm2 enable the deposition of continuous 2 nm thin Al2O3 and HfO2 layers on MoS2 at 300 °C. This fast layer closure can be achieved despite the sub-nm thickness and discontinuity of the SiO2 nucleation layer. On the basis of the experimental results, we propose a nucleation mechanism that explains this fast layer closure. Nucleation of Al2O3 and HfO2 occurs on the SiO2 islands, and fast layer closure is achieved by the lateral growth starting from the many nm-spaced SiO2 islands. Finally, the dielectric properties of Al2O3 on the functionalized MoS2 are confirmed in a top-gated capacitor that shows a leakage current of 3.8 × 10-6 A/cm2 at a 3.4 nm equivalent oxide thickness. To conclude, fast nucleation and layer closure in ALD can be achieved even for a sub-nm thin, discontinuous nucleation layer. We propose that this insight can also be applied to other ALD processes, materials, or applications where thin and fully continuous layers are required.status: publishe

    Reactive plasma cleaning and restoration of transition metal dichalcogenide monolayers

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    The cleaning of two-dimensional (2D) materials is an essential step in the fabrication of future devices, leveraging their unique physical, optical, and chemical properties. Part of these emerging 2D materials are transition metal dichalcogenides (TMDs). So far there is limited understanding of the cleaning of “monolayer” TMD materials. In this study, we report on the use of downstream H2 plasma to clean the surface of monolayer WS2 grown by MOCVD. We demonstrate that high-temperature processing is essential, allowing to maximize the removal rate of polymers and to mitigate damage caused to the WS2 in the form of sulfur vacancies. We show that low temperature in situ carbonyl sulfide (OCS) soak is an efficient way to resulfurize the material, besides high-temperature H2S annealing. The cleaning processes and mechanisms elucidated in this work are tested on back-gated field-effect transistors, confirming that transport properties of WS2 devices can be maintained by the combination of H2 plasma cleaning and OCS restoration. The low-damage plasma cleaning based on H2 and OCS is very reproducible, fast (completed in a few minutes) and uses a 300 mm industrial plasma etch system qualified for standard semiconductor pilot production. This process is, therefore, expected to enable the industrial scale-up of 2D-based devices, co-integrated with silicon technology
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