Digital Distortion Caused by Traveling- Wave-Tube Amplifiers Simulated

Future NASA missions demand increased data rates in satellite communications for near real-time transmission of large volumes of remote data. Increased data rates necessitate higher order digital modulation schemes and larger system bandwidth, which place stricter requirements on the allowable distortion caused by the high-power amplifier, or the traveling-wave-tube amplifier (TWTA). In particular, intersymbol interference caused by the TWTA becomes a major consideration for accurate data detection at the receiver. Experimentally investigating the effects of the physical TWTA on intersymbol interference would be prohibitively expensive, as it would require manufacturing numerous amplifiers in addition to acquiring the required digital hardware. Thus, an accurate computational model is essential to predict the effects of the TWTA on system-level performance when a communication system is being designed with adequate digital integrity for high data rates. A fully three-dimensional, time-dependent, TWT interaction model has been developed using the electromagnetic particle-in-cell code MAFIA (Solution of Maxwell's equations by the Finite-Integration-Algorithm). It comprehensively takes into account the effects of frequency-dependent AM (amplitude modulation)/AM and AM/PM (phase modulation) conversion, gain and phase ripple due to reflections, drive-induced oscillations, harmonic generation, intermodulation products, and backward waves. This physics-based TWT model can be used to give a direct description of the effects of the nonlinear TWT on the operational signal as a function of the physical device. Users can define arbitrary excitation functions so that higher order modulated digital signals can be used as input and that computations can directly correlate intersymbol interference with TWT parameters. Standard practice involves using communication-system-level software packages, such as SPW, to predict if adequate signal detection will be achieved. These models use a nonlinear, black-box model to represent the TWTA. The models vary in complexity, but most make several assumptions regarding the operation of the high-power amplifier. When the MAFIA TWT interaction model was used, these assumptions were found to be in significant error. In addition, digital signal performance, including intersymbol interference, was compared using direct data input into the MAFIA model and using the system-level analysis tool SPW for several higher order modulation schemes. Results show significant differences in predicted degradation between SPW and MAFIA simulations, demonstrating the significance of the TWTA approximations made in the SPW model on digital signal performance. For example, a comparison of the SPW and MAFIA output constellation diagrams for a 16-ary quadrature amplitude modulation (16-QAM) signal (data shown only for second and fourth quadrants) is shown. The upper-bound degradation was calculated from the corresponding eye diagrams. In comparison to SPW simulations, the MAFIA data resulted in a 3.6-dB larger degradation

Satellite-matrix-switched, time-division-multiple-access network simulator

A versatile experimental Ka-band network simulator has been implemented at the NASA Lewis Research Center to demonstrate and evaluate a satellite-matrix-switched, time-division-multiple-access (SMS-TDMA) network and to evaluate future digital ground terminals and radiofrequency (RF) components. The simulator was implemented by using proof-of-concept RF components developed under NASA contracts and digital ground terminal and link simulation hardware developed at Lewis. This simulator provides many unique capabilities such as satellite range delay and variation simulation and rain fade simulation. All network parameters (e.g., signal-to-noise ratio, satellite range variation rate, burst density, and rain fade) are controlled and monitored by a central computer. The simulator is presently configured as a three-ground-terminal SMS-TDMA network

Software Defined Radio Standard Architecture and its Application to NASA Space Missions

A software defined radio (SDR) architecture used in space-based platforms proposes to standardize certain aspects of radio development such as interface definitions, functional control and execution, and application software and firmware development. NASA has charted a team to develop an open software defined radio hardware and software architecture to support NASA missions and determine the viability of an Agency-wide Standard. A draft concept of the proposed standard has been released and discussed among organizations in the SDR community. Appropriate leveraging of the JTRS SCA, OMG's SWRadio Architecture and other aspects are considered. A standard radio architecture offers potential value by employing common waveform software instantiation, operation, testing and software maintenance. While software defined radios offer greater flexibility, they also poses challenges to the radio development for the space environment in terms of size, mass and power consumption and available technology. An SDR architecture for space must recognize and address the constraints of space flight hardware, and systems along with flight heritage and culture. NASA is actively participating in the development of technology and standards related to software defined radios. As NASA considers a standard radio architecture for space communications, input and coordination from government agencies, the industry, academia, and standards bodies is key to a successful architecture. The unique aspects of space require thorough investigation of relevant terrestrial technologies properly adapted to space. The talk will describe NASA's current effort to investigate SDR applications to space missions and a brief overview of a candidate architecture under consideration for space based platforms

Multiple-access phased array antenna simulator for a digital beam forming system investigation

Future versions of data relay satellite systems are currently being planned by NASA. Being given consideration for implementation are on-board digital beamforming techniques which will allow multiple users to simultaneously access a single S-band phased array antenna system. To investigate the potential performance of such a system, a laboratory simulator has been developed at NASA's Lewis Research Center. This paper describes the system simulator, and in particular, the requirements, design, and performance of a key subsystem, the phased array antenna simulator, which provides realistic inputs to the digital processor including multiple signals, noise, and nonlinearities

Hardware Architecture Study for NASA's Space Software Defined Radios

This study defines a hardware architecture approach for software defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general purpose processors, digital signal processors, field programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs) in addition to flexible and tunable radio frequency (RF) front-ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and and interfaces. The modules are a logical division of common radio functions that comprise a typical communication radio. This paper describes the architecture details, module definitions, and the typical functions on each module as well as the module interfaces. Trade-offs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify the internal physical implementation within each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios

Space Telecommunications Radio Systems (STRS) Hardware Architecture Standard: Release 1.0 Hardware Section

This report defines a hardware architecture approach for software-defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general-purpose processors, digital signal processors, field programmable gate arrays, and application-specific integrated circuits (ASICs) in addition to flexible and tunable radiofrequency front ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and interfaces. The modules are a logical division of common radio functions that compose a typical communication radio. This report describes the architecture details, the module definitions, the typical functions on each module, and the module interfaces. Tradeoffs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify a physical implementation internally on each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios

The Effect of Doppler Frequency Shift, Frequency Offset of the Local Oscillators, and Phase Noise on the Performance of Coherent OFDM Receivers

This paper first shows that the Doppler frequency shift affects the frequencies of the RF carrier, subcarriers, envelope, and symbol timing by the same percentage in an Orthogonal Frequency Division Multiplexing (OFDM) signal or any other modulated signals. Then the SNR degradation of an OFDM system due to Doppler frequency shift, frequency offset of the local oscillators and phase noise is analyzed. Expressions are given and values for 4-, 16-, 64-, and 256-QAM OFDM systems are calculated and plotted. The calculations show that the Doppler shift of the D3 project is about 305 kHz, and the degradation due to it is about 0.01 to 0.04 dB, which is negligible. The degradation due to frequency offset and phase noise of local oscillators will be the main source of degradation. To keep the SNR degradation under 0.1 dB, the relative frequency offset due to local oscillators must be below 0.01 for the 16 QAM-OFDM. This translates to an offset of 1.55 MHz (0.01 x 155 MHz) or a stability of 77.5 ppm (0.01 x 155 MHz/20 GHz) for the DI project. To keep the SNR degradation under 0.1 dB, the relative linewidth (0) due to phase noise of the local oscillators must be below 0.0004 for the 16 QAM-OFDM. This translates to a linewidth of 0.062 MHz (0.0004 x 155 MHz) of the 20 GHz RIF carrier. For a degradation of 1 dB, beta = 0.04, and the linewidth can be relaxed to 6.2 MHz

Time-Dependent Traveling Wave Tube Model for Intersymbol Interference Investigations

For the first time, a computational model has been used to provide a direct description of the effects of the traveling wave tube (TWT) on modulated digital signals. The TWT model comprehensively takes into account the effects of frequency dependent AM/AM and AM/PM conversion, gain and phase ripple; drive-induced oscillations; harmonic generation; intermodulation products; and backward waves. Thus, signal integrity can be investigated in the presence of these sources of potential distortion as a function of the physical geometry of the high power amplifier and the operational digital signal. This method promises superior predictive fidelity compared to methods using TWT models based on swept-amplitude and/or swept-frequency data. The fully three-dimensional (3D), time-dependent, TWT interaction model using the electromagnetic code MAFIA is presented. This model is used to investigate assumptions made in TWT black-box models used in communication system level simulations. In addition, digital signal performance, including intersymbol interference (ISI), is compared using direct data input into the MAFIA model and using the system level analysis tool, SPW

Intersymbol Interference Investigations Using a 3D Time-Dependent Traveling Wave Tube Model

For the first time, a physics based computational model has been used to provide a direct description of the effects of the TWT (Traveling Wave Tube) on modulated digital signals. The TWT model comprehensively takes into account the effects of frequency dependent AM/AM and AM/PM conversion; gain and phase ripple; drive-induced oscillations; harmonic generation; intermodulation products; and backward waves. Thus, signal integrity can be investigated in the presence of these sources of potential distortion as a function of the physical geometry of the high power amplifier and the operational digital signal. This method promises superior predictive fidelity compared to methods using TWT models based on swept amplitude and/or swept frequency data. The fully three-dimensional (3D), time-dependent, TWT interaction model using the electromagnetic code MAFIA is presented. This model is used to investigate assumptions made in TWT black box models used in communication system level simulations. In addition, digital signal performance, including intersymbol interference (ISI), is compared using direct data input into the MAFIA model and using the system level analysis tool, SPW (Signal Processing Worksystem)

An OFDM System Using Polyphase Filter and DFT Architecture for Very High Data Rate Applications

This paper presents a conceptual architectural design of a four-channel Orthogonal Frequency Division Multiplexing (OFDM) system with an aggregate information throughput of 622 megabits per second (Mbps). Primary emphasis is placed on the generation and detection of the composite waveform using polyphase filter and Discrete Fourier Transform (DFT) approaches to digitally stack and bandlimit the individual carriers. The four-channel approach enables the implementation of a system that can be both power and bandwidth efficient, yet enough parallelism exists to meet higher data rate goals. It also enables a DC power efficient transmitter that is suitable for on-board satellite systems, and a moderately complex receiver that is suitable for low-cost ground terminals. The major advantage of the system as compared to a single channel system is lower complexity and DC power consumption. This is because the highest sample rate is half that of the single channel system and synchronization can occur at most, depending on the synchronization technique, a quarter of the rate of a single channel system. The major disadvantage is the increased peak-to-average power ratio over the single channel system. Simulation results in a form of bit-error-rate (BER) curves are presented in this paper