Two Distributed Arithmetic Based High Throughput Architectures of Non-Pipelined LMS Adaptive Filters

Distributed arithmetic (DA) is an efficient look-up table (LUT) based approach. The throughput of DA based implementation is limited by the LUT size. This paper presents two high-throughput architectures (Type I and II) of non-pipelined DA based least-mean-square (LMS) adaptive filters (ADFs) using two's complement (TC) and offset-binary coding (OBC) respectively. We formulate the LMS algorithm using the steepest descent approach with possible extension to its power-normalized LMS version and followed by its convergence properties. The coefficient update equation of LMS algorithm is then transformed via TC DA and OBC DA to design and develop non-pipelined architectures of ADFs. The proposed structures employ the LUT pre-decomposition technique to increase the throughput performance. It enables the same mapping scheme for concurrent update of the decomposed LUTs. An efficient fixed-point quantization model for the evaluation of proposed structures from a realistic point-of-view is also presented. It is found that Type II structure provides higher throughput than Type I structure at the expense of slow convergence rate with almost the same steady-state mean square error. Unlike existing non-pipelined LMS ADFs, the proposed structures offer very high throughput performance, especially with large order DA base units. Furthermore, they are capable of performing less number of additions in every filter cycle. Based on the simulation results, it is found that 256th order filter with 8th order DA base unit using Type I structure provides 9.41 × higher throughput while Type II structure provides 16.68 × higher throughput as compared to the best existing design. Synthesis results show that 32nd order filter with 8th order DA base unit using Type I structure achieves 38.76% less minimum sampling period (MSP), occupies 28.62% more area, consumes 67.18% more power, utilizes 49.06% more slice LUTs and 3.31% more flip-flops (FFs), whereas Type II structure achieves 51.25% less MSP, occupies 21.42% more area, consumes 47.84% more power, utilizes 29.10% more slice LUTs and 1.47% fewer FFs as compared to the best existing design.</p

Empowering Energy-Sustainable IoT Devices With Harvest Energy-Optimized Deep Neural Networks

There is a growing demand for low-power network devices; therefore, enabling technologies for the Internet of Things (IoT) is significantly important. This paper proposed resource allocation by maximizing the harvested energy to substantially improve Energy Efficiency (EE) and regulate transmission power for the scheduled IoT devices. Energy Harvesting (EH) is a viable technology that enables long-term and self-sustainable operations for IoT devices. The Simultaneous Wireless Information and Power Transfer (SWIPT) has been proposed as a promising solution for maximizing EE while ensuring the quality of service of all IoT devices, where the ultra-low power devices harvest energy in Power Splitting (PS) mode. This paper applied the proposed Optimal Transmit Power and PS Ratio (OTPR) algorithm to maximize the EE for SWIPT based on the partial derivative of Lagrange dual decomposition methods. The algorithm jointly optimized the allocation of the channel, PS, and power control to solve the distributed non-convex and NP-hardness caused by co-channel interference. A novel training was proposed for Deep Neural Network (DNN) algorithms chain rules to minimize the loss function based on updating the parameters of the weights hidden layer and convergence training to achieve near-optimal performance and minimize unneeded label data. The simulation results showed that the DNN training for the chain rule provided a near-optimal performance EE with the shortest training time. This observation indicated that decreasing the loss function at every training optimizes the co-channel conditions for IoT devices by assigning the EH requirement to meet the minimum harvesting need

Two Distributed Arithmetic Based High Throughput Architectures of Non-Pipelined LMS Adaptive Filters

Distributed arithmetic (DA) is an efficient look-up table (LUT) based approach. The throughput of DA based implementation is limited by the LUT size. This paper presents two high-throughput architectures (Type I and II) of non-pipelined DA based least-mean-square (LMS) adaptive filters (ADFs) using twos complement (TC) and offset-binary coding (OBC) respectively. We formulate the LMS algorithm using the steepest descent approach with possible extension to its power-normalized LMS version and followed by its convergence properties. The coefficient update equation of LMS algorithm is then transformed via TC DA and OBC DA to design and develop non-pipelined architectures of ADFs. The proposed structures employ the LUT pre-decomposition technique to increase the throughput performance. It enables the same mapping scheme for concurrent update of the decomposed LUTs. An efficient fixed-point quantization model for the evaluation of proposed structures from a realistic point-of-view is also presented. It is found that Type II structure provides higher throughput than Type I structure at the expense of slow convergence rate with almost the same steady-state mean square error. Unlike existing non-pipelined LMS ADFs, the proposed structures offer very high throughput performance, especially with large order DA base units. Furthermore, they are capable of performing less number of additions in every filter cycle. Based on the simulation results, it is found that 256th order filter with 8th order DA base unit using Type I structure provides 9 :41 x higher throughput while Type II structure provides 16 :68 x higher throughput as compared to the best existing design. Synthesis results show that 32nd order filter with 8th order DA base unit using Type I structure achieves 38 :76% less minimum sampling period (MSP), occupies 28 :62% more area, consumes 67 :18% more power, utilizes 49 :06% more slice LUTs and 3 :31% more flip-flops (FFs), whereas Type II structure achieves 51 :25% less MSP, occupies 21 :42% more area, consumes 47 :84% more power, utilizes 29 :10% more slice LUTs and 1 :47% fewer FFs as compared to the best existing design.Funding Agencies|Umm Al-Qura University [22UQU4350362DSR01]; University of Tabuk [S-1442-0151]</p

Low-Area and Low-Power VLSI Architectures for Long Short-Term Memory Networks

Long short-term memory (LSTM) networks are extensively used in various sequential learning tasks, including speech recognition. Their significance in real-world applications has prompted the demand for cost-effective and power-efficient designs. This paper introduces LSTM architectures based on distributed arithmetic (DA), utilizing circulant and block-circulant matrix-vector multiplications (MVMs) for network compression. The quantized weights-oriented approach for training circulant and block-circulant matrices is considered. By formulating fixed-point circulant/block-circulant MVMs, we explore the impact of kernel size on accuracy. Our DA-based approach employs shared full and partial methods of add-store/store-add followed by a select unit to realize an MVM. It is then coupled with a multi-partial strategy to reduce complexity for larger kernel sizes. Further complexity reduction is achieved by optimizing decoders of multiple select units. Pipelining in add-store enhances speed at the expense of a few pipelined registers. The results of the field-programmable gate array showcase the superiority of our proposed architectures based on the partial store-add method, delivering reductions of 98.71% in DSP slices, 33.59% in slice look-up tables, 13.43% in flip-flops, and 29.76% in power compared to the state-of-the-art.</p

Optimal Performance of Photovoltaic-Powered Water Pumping System

Photovoltaic (PV) systems are one of the promising renewable energy sources that have many industrial applications; one of them is water pumping systems. This paper proposes a new application of a PV system for water pumping using a three-phase induction motor while maximizing the daily quantity of water pumped while considering maximizing both the efficiency of the three-phase induction motor and the harvested power from the PV system. This harvesting is performed through maximum power point tracking (MPPT) of the PV system. The proposed technique is applied to a PV-powered 3 phase induction motor water pumping system (PV-IMWPS) at any operating point. Firstly, an analytical approach is offered to find the optimal firing pattern of the inverter (V-F) for the motor through optimal flux control. This flux control is presented for maximizing the pump flow rate while achieving MPPT for the PV system and maximum efficiency of the motor at any irradiance and temperature. The provided analytical optimal flux control is compared to a fixed flux one to ascertain its effectiveness. The obtained feature of the suggested optimal flux control validates a significant improvement in the system performances, including the daily pumped quantity, motor power factor, and system efficiency. Then converting the data from the first analytical step into an intelligent approach using an adaptive neuro-fuzzy inference system (ANFIS). This ANFIS is trained offline with the input (irradiance and temperature) while the output is the inverter pattern to enhance the performance of the proposed pumping system, PV-IMWPS