17 research outputs found
52 km-long transmission link using a 50 Gb/s O-band silicon microring modulator co-packaged with a 1V-CMOS driver
We present an O-band silicon microring modulator with up to 50 Gb/s modulation rates, co-packaged with a 1V-CMOS driver in a dispersion un-compensated, transmission experiment through 52 km of standard single-mode fiber. The experimental results show 10(-9) error-rate operation with a negligible power penalty of 0.2 dB for 40 Gb/s and wide-open eye diagrams for 50 Gb/s data, corresponding to a record high bandwidth-distance product of 2600 Gb.km/s. A comparative analysis between the proposed transmitter assembly and a commercial LiNbO3 modulator revealed a moderate increase of 3.8 dB in power penalty, requiring only 20% of the driving voltage level used by the commercial modulator
4-channel 200 Gb/s WDM O-band silicon photonic transceiver sub-assembly
We demonstrate a 200G capable WDM O-band optical transceiver comprising a 4-element array of Silicon Photonics ring modulators (RM) and Ge photodiodes (PD) co-packaged with a SiGe BiCMOS integrated driver and a SiGe transimpedance amplifier (TIA) chip. A 4 x 50 Gb/s data modulation experiment revealed an average extinction ratio (ER) of 3.17 dB, with the transmitter exhibiting a total energy efficiency of 2 pJ/bit. Data reception has been experimentally validated at 50 Gb/s per lane, achieving an interpolated 10E-12 bit error rate (BER) for an input optical modulation amplitude (OMA) of -9.5 dBm and a power efficiency of 2.2 pJ/bit, yielding a total power efficiency of 4.2 pJ/bit for the transceiver, including heater tuning requirements. This electro-optic subassembly provides the highest aggregate data-rate among O-band RM-based silicon photonic transceiver implementations, highlighting its potential for next generation WDM Ethernet transceivers. (C) 2020 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
320 Gb/s WDM Transmission in Monolithically Integrated Al<sub>2</sub>O<sub>3</sub>:Er<sup>3+</sup>Spiral Amplifier on Si<sub>3</sub>N<sub>4</sub>
O-Band silicon photonic transmitters for datacom and computercom interconnects
Today, the datacenter ecosystems are fueling the demand for novel transmitter (TX) technologies complying with the off-board, on-board, and chip-to-chip computing needs. This has set a new class of requirements for the TX infrastructure that should now offer multiple credentials, namely: high-speed, O-band operation for avoiding dispersion compensation in long distances, wavelength-division multiplexing (WDM) capabilities for higher throughput and multicasting/broadcasting support, and tight copackaging with low-power electronics. Silicon (Si) photonic TXs have been extensively studied toward high-speed and WDM TX engines targeting mainly C-band. Only a limited number of Si-Pho O-band TXs have been reported, however with <= 32 Gb/s/channel line-rate capabilities and with a WDM portfolio that has not been fully explored yet. In this paper, we introduce a novel silicon photonic high-speed O-band TX hardware platform that can meet the current datacom and computercom interconnect requirements. We demonstrate a ring modulator (RM) based four-channelWDMTX at 4 x 40 Gb/s non-return-to-zero (NRZ) operation that supports wavelength parallelism in unicast operation but can also pave the way toward WDM TX engines for the post-100 GbE TX era. Moreover, we present a broadband Si Mach-Zehnder modulator employed in a WDM modulation scheme of 2 x 25 Gb/s NRZ signals and demonstrate multicasting when combined with a 8x8 passive arrayed waveguide grating router (AWGR) wavelength router, addressing the broadcasting needs of traffic usually encountered in cache-coherent multisocket settings. Finally, we further demonstrate the tight synergy of O-band Si-RM modulators with high-speed CMOS electronics, presenting an RM-based TX assembly prototype employing a fully depleted silicon-on-insulator CMOS driver, delivering 50-Gb/s NRZ operation
Silicon photonic 8 × 8 cyclic Arrayed Waveguide Grating Router for O-band on-chip communication
Silicon circuits for chip-to-chip communications in multi-socket server board interconnects
Multi-socket server boards (MSBs) exploit the interconnection of multiple processor chips towards forming powerful cache coherent systems, with the interconnect technology comprising a key element in boosting processing performance. Here, we present an overview of the current electrical interconnects for MSBs, outlining the main challenges currently faced. We propose the use of silicon photonics (SiPho) towards advancing interconnect throughput, socket connectivity and energy efficiency in MSB layouts, enabling a flat-topology wavelength division multiplexing (WDM)-based point-to-point (p2p) optical MSB interconnect scheme. We demonstrate WDM SiPho transceivers (TxRxs) co-assembled with their electronic circuits for up to 50 Gb/s line rate and 400 Gb/s aggregate data transmission and SiPho arrayed waveguide grating routers that can offer collision-less time of flight connectivity for up to 16 nodes. The capacity can scale to 2.8 Gb/s for an eight-socket MSB, when line rate scales to 50 Gb/s, yielding up to 69% energy reduction compared with the QuickPath Interconnect and highlighting the feasibility of single-hop p2p interconnects in MSB systems with >4 sockets