286 research outputs found

    Advanced photonic routing sub-systems with efficient routing control

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    In recent years, there has been much interest in the development of optical switches which can route optical signals from different input guides to different outputs based on thermo-optic and electro-optic technologies. Such switches, which can be reconfigured on millisecond and microsecond timescales, have already attracted commercial interest. However switches which are able to reconfigure on the nanosecond timescales required for packet switching have been more challenging and only in recent years, have router concepts been devised to allow lossless routers to be constructed able to switch on nanosecond timescales with more than 16×16 ports. This paper will therefore review the advances that have occurred to allow such operation and then describe recent studies that have begun to determine the electronic control and functionality required to enable full and practical operation of such switches in high performance networks.This research has received funding from the UK Engineering and Physical Sciences Research Council through the INTERNET Project, STAR and COPOS II grants and the European Commission under FP7 grant agreement ICT 257210 PARADIGM.This is the author accepted manuscript. The final version is available from IEEE via http://dx.doi.org/10.1109/ICTON.2015.719339

    Low-energy, high-performance lossless 8×8 SOA switch

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    We demonstrate the first monolithically-integrated active-passive lossless 8×8 SOA switch. A wide IPDR of 14.5dB for penalty <1dB is achieved. The switch paths through the device exhibit excellent uniformity.The research leading to these results has received funding from the UK EPSRC through the INTERNET, STAR and COPOS II grants and the European Commission under FP7 grant agreement ICT 257210 PARADIGM.This is the accepted manuscript. The final version is available from OSA at http://www.opticsinfobase.org/abstract.cfm?uri=OFC-2015-Th4E.6

    Demonstration of a lossless monolithic 16x16 QW SOA switch

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    10Gb/s error-free operation of the first monolithic 16×16 quantum well semiconductor optical amplifier switch is demonstrated. The switch has a 2dB facet-to-facet gain and a minimum power penalty of 2.5dB

    Generation of Inhomogeneous Acoustic Waves Using an Array of Loudspeakers

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    In previous studies it has been shown that pressure fields created by inhomogeneous sound waves (waves which decay in a direction perpendicular to their propagation direction) are able to transmit energy into objects more effectively than ones created by conventional sound waves. This behavior may be useful in the detection of hidden explosive threats. To explore this, a device capable of constructing inhomogeneous waves is being developed. The proposed device is an acoustic array consisting of several high-frequency speakers. The speakers are independently driven to construct a desired inhomogeneous pressure field on a target surface. Inhomogeneous pressure fields were reconstructed across a span of decay parameters and standoff distances. Results show low root-mean-square errors at realistic levels of power consumption. These results imply that the device can recreate desired inhomogeneous pressure fields with high enough accuracy and low enough power consumption to test the energy transmission properties of inhomogeneous waves on mock explosives, which may be useful in applications related to improvised explosive device detection and defeat

    Low latency optical switch for high performance computing with minimized processor energy load [Invited]

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    Power density and cooling issues are limiting the performance of high performance chip multiprocessors (CMPs), and off-chip communications currently consume more than 20% of power for memory, coherence, PCI, and Ethernet links. Photonic transceivers integrated with CMPs are being developed to overcome these issues, potentially allowing low hop count switched connections between chips or data center servers. However, latency in setting up optical connections is critically important in all computing applications, and having transceivers integrated on the processor chip also pushes other network functions and their associated power consumption onto the chip. In this paper, we propose a low latency optical switch architecture that minimizes the power consumed on the processor chip for two scenarios: multiple-socket shared memory coherence networks and optical top-of-rack switches for data centers. The switch architecture reduces power consumed on the CMP using a control plane with a simplified send and forget server interface and the use of a hybrid Mach–Zehnder interferometer and semiconductor optical amplifier integrated optical switch with electronic buffering. Results show that the proposed architecture offers a 42% reduction in head latency at low loads compared with a conventional scheduled optical switch as well as offering increased performance for streaming and incast traffic patterns. Power dissipated on the server chip is shown to be reduced by more than 60% compared with a scheduled optical switch architecture with ring resonator switching.This work was supported by the UK Engineering and Physical Sciences Research Council (EPSRC) INTERNET program grant and an EPSRC Fellowship grant to Philip Watts. Both University College London and the University of Cambridge are members of GreenTouch.This paper was published in the Journal of Optical Communications and Networking and is made available as an electronic reprint with the permission of OSA. The paper can be found at the following URL on the OSA website: http://www.opticsinfobase.org/jocn/abstract.cfm?uri=jocn-7-3-A498. Systematic or multiple reproduction or distribution to multiple locations via electronic or other means is prohibited and is subject to penalties under law. This is the accepted manuscript of a paper published in the Journal of Optical Communications and Networking, Vol. 7, Issue 3, pp. A498-A510 (2015) http://dx.doi.org/10.1364/JOCN.7.00A49
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