A New Tool for Intelligent Parallel Processing of Radar/SAR Remotely Sensed Imagery

A novel parallel tool for large-scale image enhancement/reconstruction and postprocessing of radar/SAR sensor systems is addressed. The proposed parallel tool performs the following intelligent processing steps: image formation, for the application of different system-level effects of image degradation with a particular remote sensing (RS) system and simulation of random noising effects, enhancement/reconstruction by employing nonparametric robust high-resolution techniques, and image postprocessing using the fuzzy anisotropic diffusion technique which incorporates a better edge-preserving noise removal effect and faster diffusion process. This innovative tool allows the processing of high-resolution images provided with different radar/SAR sensor systems as required by RS endusers for environmental monitoring, risk prevention, and resource management. To verify the performance implementation of the proposed parallel framework, the processing steps are developed and specifically tested on graphic processing units (GPU), achieving considerable speedups compared to the serial version of the same techniques implemented in C language

A Fading Channel Simulator Implementation Based on GPU Computing Techniques

Channel simulators are powerful tools that permit performance tests of the individual parts of a wireless communication system. This is relevant when new communication algorithms are tested, because it allows us to determine if they fulfill the communications standard requirements. One of these tests consists of evaluating the system performance when a communication channel is considered. In this sense, it is possible to model the channel as an FIR filter with time-varying random coefficients. If the number of coefficients is increased, then a better approach to real scenarios can be achieved; however, in that case, the computational complexity is increased. In order to address this issue, a design methodology for computing the time-varying coefficients of the fading channel simulators using consumer-designed graphic processing units (GPUs) is proposed. With the use of GPUs and the proposed methodology, it is possible for nonspecialized users in parallel computing to accelerate their simulation developments when compared to conventional software. Implementation results show that the proposed approach allows the easy generation of communication channels while reducing the processing time. Finally, GPU-based implementation takes precedence when compared with the CPU-based implementation, due to the scattered nature of the channel. � 2015 R. Carrasco-Alvarez et al

Experiment Design Regularization-Based Hardware/Software Codesign for Real-Time Enhanced Imaging in Uncertain Remote Sensing Environment

<p/> <p>A new aggregated Hardware/Software (HW/SW) codesign approach to optimization of the digital signal processing techniques for enhanced imaging with real-world uncertain remote sensing (RS) data based on the concept of descriptive experiment design regularization (DEDR) is addressed. We consider the applications of the developed approach to typical single-look synthetic aperture radar (SAR) imaging systems operating in the real-world uncertain RS scenarios. The software design is aimed at the algorithmic-level decrease of the computational load of the large-scale SAR image enhancement tasks. The innovative algorithmic idea is to incorporate into the DEDR-optimized fixed-point iterative reconstruction/enhancement procedure the convex convergence enforcement regularization via constructing the proper multilevel projections onto convex sets (POCS) in the solution domain. The hardware design is performed via systolic array computing based on a Xilinx Field Programmable Gate Array (FPGA) XC4VSX35-10ff668 and is aimed at implementing the unified DEDR-POCS image enhancement/reconstruction procedures in a computationally efficient multi-level parallel fashion that meets the (near) real-time image processing requirements. Finally, we comment on the simulation results indicative of the significantly increased performance efficiency both in resolution enhancement and in computational complexity reduction metrics gained with the proposed aggregated HW/SW co-design approach. </p

Low-cost power systems metrology laboratory based on raspberry Pi

In this paper, a low-cost Power Systems Metrology Laboratory, based on the Raspberry Pi board and the ADE7878 energy metering IC is presented. The designed experimental platform is intended for developing skills among the undergraduate students of the University of Strathclyde, Glasgow, and the Autonomous University of Yucatan, Mexico. A series of exercises have been developed in order to measure different Power quantities and to evaluate different definitions of such quantities to observe how the accuracy of the measurements is affected, particularly, when non-sinusoidal conditions exist. The system is capable to perform measurements of single or three-phase, employing current transformers. A set of Simulink blocks is ready to use for the students, including PMU algorithms. The proposed laboratory facilitate the evaluation of new algorithms and functions, developed by the students

An efficient systolic array grid-based structure of the robust Bayesian regularization technique for real-time enhanced imaging in uncertain remote sensing environment

In this paper, we address a hardware implementation of the efficient robust Bayesian regularization architecture for the real-time enhancement of large-scale remote sensing (RS) imaging. The efficient sense of the proposed architecture is related to the high-performance embedded implementation that is achieved with the aggregation of parallel computing and systolic array design techniques in a novel grid connected-based accelerator. Then, the developed high-speed accelerator is integrated with an embedded processor via the HW/SW co-design paradigm. The presented approach is used for solving RS image enhancement/reconstruction of the ill-conditioned inverse spatial spectrum pattern estimation problems via an interesting low-cost high-performance embedded computing solution. Finally, we show the achieved results and how we drastically reduced the computational load for real-world large-scale geospatial images. © 2014 Springer-Verlag Berlin Heidelberg

A Triply Selective MIMO Channel Simulator Using GPUs

A methodology for implementing a triply selective multiple-input multiple-output (MIMO) simulator based on graphics processing units (GPUs) is presented. The resulting simulator is based on the implementation of multiple double-selective single-input single-output (SISO) channel generators, where the multiple inputs and the multiple received signals have been transformed in order to supply the corresponding space correlation of the channel under consideration. A direct consequence of this approach is the flexibility provided, which allows different propagation statistics to each SISO channel to be specified and thus more complex environments to be replicated. It is shown that under some specific constraints, the statistics of the triply selective MIMO simulator are the same as those reported in the state of art. Simulation results show the computational time improvement achieved, up to 650-fold for an 8 × 8 MIMO channel simulator when compared with sequential implementations. In addition to the computational improvement, the proposed simulator offers flexibility for testing a variety of scenarios in vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) systems