Configurable LDPC Decoder Architecture for Regular and Irregular Codes

Low Density Parity Check (LDPC) codes are one of the best error correcting codes that enable the future generations of wireless devices to achieve higher data rates with excellent quality of service. This paper presents two novel flexible decoder architectures. The first one supports (3, 6) regular codes of rate 1/2 that can be used for different block lengths. The second decoder is more general and supports both regular and irregular LDPC codes with twelve combinations of code lengths −648, 1296, 1944-bits and code rates-1/2, 2/3, 3/4, 5/6- based on the IEEE 802.11n standard. All codes correspond to a block-structured parity check matrix, in which the sub-blocks are either a shifted identity matrix or a zero matrix. Prototype architectures for both LDPC decoders have been implemented and tested on a Xilinx field programmable gate array.NokiaNational Science Foundatio

Experimental Investigation of Cooperative Schemes on a Real-Time DSP-Based Testbed

Experimental results on the well-known cooperating relaying schemes, amplify-and-forward (AF), detect-and-forward (DF), cooperative maximum ratio combining (CMRC), and distributed space-time coding (DSTC), are presented in this paper. A novel relaying scheme named “selection relaying” (SR), in which one of two relays are selected base on path-loss, is also tested. For all schemes except AF receive antenna diversity is as an option which can be switched on or off. For DF and DSTC a feature “selective” where the relay only forwards frames with a receive SNR above 6 dB is introduced. In our measurements, all cooperative relaying schemes above increase the coverage area as compared with direct transmission. The features “antenna diversity” and “selective” improve the performance. Good performance is obtained with CMRC, DSTC, and SR