Elementary science textbooks : their contents, text characteristics, and comprehensibility : longitudinal study

Includes bibliographical references (leaves 21-24)Supported in part by a grant from the National Science Foundation, #NSFMDR85-50320, and in part by the National Institute of Education, #400-81-003

Impact of Corporate Governance Practices on Firm Capital Structure and Profitability: A Study of Selected Hotels and Restaurant Companies in Sri Lanka.

Corporate governance issues have been a growing area of management research especially among large and listed firms. Good corporate governance practices are regarded as important in reducing risk for investors, attracting investment capital and improving the performance of companies. Companies need financial resources and better earnings to promote their objectives. Therefore, factorsmay affect the capital structure and profitability of companies should be considered carefully. The purpose of the present study is to investigate whether there is any relationship among some specific characters of corporate governance, capital structure and profitability of listedHotels &Restaurant companies in Colombo Stock Exchange (CSE). To do so, 18 companies were selected from those which were listed inCSE during the 2007-2012. The ‘Board Composition(BC)’, ‘Board Size (BS)’ and ‘CEOduality (CEOD)’ were considered as independent variables, whereas,’ Debt Ratio(DR)’,‘Debt-to-Equity Ratio(DER)’,‘Returns on Equity(ROE)’,and ‘Return on Assets(ROA)’ as dependent variable. The results indicate a positive relationship between ‘BS; BC; CEOD; ROE; ROA and DERwhereas negative relationship between BS; BID and DR.in addition CEOD have a positive relationship with DR.In addition, none of the variables have a significant relationship with capital structure and profitability. Key words: Corporate Governance; Capital Structure and Profitability

Exascale Algorithms for Generalized MPI_Comm_split

Abstract not provide

Efficient Symmetry Reduction and the Use of State Symmetries for Symbolic Model Checking

One technique to reduce the state-space explosion problem in temporal logic model checking is symmetry reduction. The combination of symmetry reduction and symbolic model checking by using BDDs suffered a long time from the prohibitively large BDD for the orbit relation. Dynamic symmetry reduction calculates representatives of equivalence classes of states dynamically and thus avoids the construction of the orbit relation. In this paper, we present a new efficient model checking algorithm based on dynamic symmetry reduction. Our experiments show that the algorithm is very fast and allows the verification of larger systems. We additionally implemented the use of state symmetries for symbolic symmetry reduction. To our knowledge we are the first who investigated state symmetries in combination with BDD based symbolic model checking

LNCS

Concurrent accesses to shared data structures must be synchronized to avoid data races. Coarse-grained synchronization, which locks the entire data structure, is easy to implement but does not scale. Fine-grained synchronization can scale well, but can be hard to reason about. Hand-over-hand locking, in which operations are pipelined as they traverse the data structure, combines fine-grained synchronization with ease of use. However, the traditional implementation suffers from inherent overheads. This paper introduces snapshot-based synchronization (SBS), a novel hand-over-hand locking mechanism. SBS decouples the synchronization state from the data, significantly improving cache utilization. Further, it relies on guarantees provided by pipelining to minimize synchronization that requires cross-thread communication. Snapshot-based synchronization thus scales much better than traditional hand-over-hand locking, while maintaining the same ease of use

Pessimistic Software Lock-Elision

Read-write locks are one of the most prevalent lock forms in concurrent applications because they allow read accesses to locked code to proceed in parallel. However, they do not offer any parallelism between reads and writes. This paper introduces pessimistic lock-elision (PLE), a new approach for non-speculatively replacing read-write locks with pessimistic (i.e. non-aborting) software transactional code that allows read-write concurrency even for contended code and even if the code includes system calls. On systems with hardware transactional support, PLE will allow failed transactions, or ones that contain system calls, to preserve read-write concurrency. Our PLE algorithm is based on a novel encounter-order design of a fully pessimistic STM system that in a variety of benchmarks spanning from counters to trees, even when up to 40% of calls are mutating the locked structure, provides up to 5 times the performance of a state-of-the-art read-write lock.National Science Foundation (U.S.) (Grant 1217921

Clinical history and management recommendations of the smooth muscle dysfunction syndrome due to ACTA2 arginine 179 alterations

Smooth muscle dysfunction syndrome (SMDS) due to heterozygous ACTA2 arginine 179 alterations is characterized by patent ductus arteriosus, vasculopathy (aneurysm and occlusive lesions), pulmonary arterial hypertension, and other complications in smooth muscle-dependent organs. We sought to define the clinical history of SMDS to develop recommendations for evaluation and management. Medical records of 33 patients with SMDS (median age 12 years) were abstracted and analyzed. All patients had congenital mydriasis and related pupillary abnormalities at birth and presented in infancy with a patent ductus arteriosus or aortopulmonary window. Patients had cerebrovascular disease characterized by small vessel disease (hyperintense periventricular white matter lesions; 95%), intracranial artery stenosis (77%), ischemic strokes (27%), and seizures (18%). Twelve (36%) patients had thoracic aortic aneurysm repair or dissection at median age of 14 years and aortic disease was fully penetrant by the age of 25 years. Three (9%) patients had axillary artery aneurysms complicated by thromboembolic episodes. Nine patients died between the ages of 0.5 and 32 years due to aortic, pulmonary, or stroke complications, or unknown causes. Based on these data, recommendations are provided for the surveillance and management of SMDS to help prevent early-onset life-threatening complications

Active memory controller

Inability to hide main memory latency has been increasingly limiting the performance of modern processors. The problem is worse in large-scale shared memory systems, where remote memory latencies are hundreds, and soon thousands, of processor cycles. To mitigate this problem, we propose an intelligent memory and cache coherence controller (AMC) that can execute Active Memory Operations (AMOs). AMOs are select operations sent to and executed on the home memory controller of data. AMOs can eliminate a significant number of coherence messages, minimize intranode and internode memory traffic, and create opportunities for parallelism. Our implementation of AMOs is cache-coherent and requires no changes to the processor core or DRAM chips. In this paper, we present the microarchitecture design of AMC, and the programming model of AMOs. We compare AMOs\u27 performance to that of several other memory architectures on a variety of scientific and commercial benchmarks. Through simulation, we show that AMOs offer dramatic performance improvements for an important set of data-intensive operations, e.g., up to 50x faster barriers, 12x faster spinlocks, 8.5x-15x faster stream/array operations, and 3x faster database queries. We also present an analytical model that can predict the performance benefits of using AMOs with decent accuracy. The silicon cost required to support AMOs is less than 1% of the die area of a typical high performance processor, based on a standard cell implementation