11 research outputs found

    Frame Prefetching Cache using Multithreaded Frame Scheduling Information

    No full text
    ์†Œํ”„ํŠธ์›จ์–ด ๋ฐฉ์‹ ๋‹ค์ค‘์“ฐ๋ ˆ๋”ฉ ์ˆ˜ํ–‰ ๋ชจํ…”์—์„œ๋Š” ์ปดํŒŒ์ผ๋Ÿฌ์— ์˜ํ•ด ์›๊ฒฉ ์ ‘๊ทผ์ด ๊ตฌ๋ถ„๋˜๊ณ , ๋น ๋ฅธ ๋ฌธ๋งฅ ์ „ํ™˜์„ ํ†ตํ•˜์—ฌ ๊ธด ์›๊ฒฉ์ฐธ์กฐ ์ง€์—ฐ ์‹œ๊ฐ„์ด ๊ฐ์ถ”์–ด์ง€๋Š” ๋ฐฉ์‹์ด ์‚ฌ์šฉ๋œ๋‹ค. TAM ์ˆ˜ํ–‰ ๋ชจ๋ธ์—์„œ๋Š” ์“ฐ๋ ˆ๋“œ์˜ ์ง€์—ญ ๋ฉ”๋ชจ๋ฆฌ ์ ‘๊ทผ์ด ํ”„๋ ˆ์ž„์ด๋ผ๋Š” ์ž๋ฃŒ ๊ตฌ์กฐ๋ฅผ ํ†ตํ•˜์—ฌ ์ผ์–ด๋‚˜๋Š”๋ฐ, ๋ณธ ๋…ผ๋ฌธ์—์„œ๋Š” ํ”„๋ ˆ์ž„ ๊ตฌ์กฐ๋ฅผ ์œ„ํ•œ ์บ์‰ฌ ๋ฉ”๋ชจ๋ฆฌ๋ฅผ ๋„์ž…ํ•˜๊ณ , ์บ์‰ฌ ์‹คํŒจ์œจ์„ ์ค„์ด๊ธฐ ์œ„ํ•˜์—ฌ ๋‘ ๊ฐ€์ง€ ๊ธฐ๋ฒ•์„ ์ ์šฉํ•˜์˜€๋‹ค. ์ฒซ ์งธ๋Š” ํ”„๋ ˆ์ž„ ์Šค์ผ€์ฅด๋ง ์ •๋ณด์— ๊ทผ๊ฑฐํ•œ ์„ ๋ฐ˜์ž… ๋ฐฉ์‹์ด๊ณ , ๋‘˜ ์งธ๋Š” ํ”„๋ ˆ์ž„ ์ž‘์—… ์ง‘ํ•ฉ์˜ ๊ฐœ๋…์— ์˜ํ•ด ํ”„๋ ˆ์ž„ ์‹คํ–‰ ์ˆœ์„œ๋ฅผ ๋ฐ”๊พธ๋Š” ๊ฒƒ์ด๋‹ค. ๋‹ค์ค‘์“ฐ๋ ˆ๋”ฉ ๋ฐฉ์‹ ์‹œ๋ฎฌ๋ ˆ์ด์…˜์„ ํ†ตํ•˜์—ฌ ๋ฒค์น˜๋งˆํฌ ํ”„๋กœ๊ทธ๋žจ์— ๋Œ€ํ•˜์—ฌ ์บ์‰ฌ ์„ฑ๋Šฅ ์‹คํ—˜์„ ํ•˜์˜€์œผ๋ฉฐ, ์บ์‰ฌ ์‹คํŒจ์˜ ์›์ธ์„ ๋ถ„๋ฅ˜ํ•˜๊ณ  ๋ถ„์„ํ•˜์˜€๋‹ค. ๋ณธ ๋…ผ๋ฌธ์—์„œ๋Š” ์Šค์ผ€์ฅด๋ง ์ •๋ณด์— ๊ทผ๊ฑฐํ•œ ํ”„๋ ˆ์ž„ ์„ ๋ฐ˜์ž… ๋ฐฉ์‹์ด ์บ์‰ฌ ์‹คํŒจ์œจ์„ ์ค„์ด๋Š” ๋ฐ ๋งค์šฐ ํšจ๊ณผ์ ์ž„์„ ๋ณด์ด๋ฉฐ, ์ž‘์—… ํ”„๋ ˆ์ž„ ์ง‘ํ•ฉ์— ์˜ํ•œ ํ”„๋ ˆ์ž„์˜ ์‹คํ–‰ ์ˆœ์„œ ๋ณ€๊ฒฝ์€ ์„ ๋ฐ˜์ž… ๋ณด๋‹ค๋Š” ๋œ ํšจ๊ณผ์ ์ž„์„ ๋ณด์ธ๋‹ค. ; In a software-oriented multithreading execution model, the compiler identifies remote accesses and performs fast context switches to hide high access latency, In the TAM model of execution, threads access local memory through a data structure called a "frame". This paper introduces a cache memory architecture for frame structure and applies two techniques to reduce the cache miss ratio, One is frame prefetching, which is based on frame scheduling information, and the other is changing frame execution sequences by the working frame set concept. Multithreading simulation is performed using a set of benchmark programs and causes of cache misses are classified and analyzed. This paper shows the promising result that the frame prefetching based on scheduling information is very effective to reduce the cache miss ratio. But the effect of reordering the sequence of the frame execution is not so significant than the prefetching.๋ณธ ์—ฐ๊ตฌ๋Š” ํ•œ๊ตญ๊ณผํ•™์žฌ๋‹จ ํ•ต์‹ฌ์ „๋ฌธ์—ฐ๊ตฌ๊ณผ์ œ 951-0910-126-2์˜ ์ง€์›์œผ๋กœ ์ˆ˜ํ–‰๋˜์—ˆ
    corecore