Simulating enterprise architecture models

Business and ICT strategic alignment remains an ongoing challenge facing organizations as they react to changing requirements by adapting or introducing new technologies to existing infrastructure. Enterprise Architecture (EA) has increasingly become relevant to these demands and as a consequence numerous methods and frameworks for pursuing EA have emerged. However these approaches remain bloated, time-consuming and lacking in precision. This paper proposes a lightweight method for EA (LEAP) and introduces a language for representing EA components that lends itself to modelling as-is and to-be EA with a concrete aim to providing a simulation environment that delivers an unambiguous description of the required changes. The LEAP method and the language are illustrated with a detailed case study of business change currently being addressed by UK higher education institutions

Maintenance of Enterprise Architecture Models

Enterprise architecture (EA) models are tools of analysis, communication, and support towards enterprise transformation. These models need a suitable maintenance process to support comprehensive knowledge of the enterprise’s structure and dynamics. This study aims to identify and discuss the existing approaches to EA model maintenance published in the scientific literature. A systematic literature review was employed as the research method. A keyword-based search in six databases identified a total of 4495 papers in which 31 primary studies were included. A total of nine categories of EA model maintenance approaches were identified from both information systems and enterprise engineering fields of research. The increasing amount of research in EA model maintenance suggests that the topic still presents opportunities for research contributions. This study also proposes future lines of research according to the results identified in the theoretical corpus

Cross-platform validation of notional baseline architecture models of naval electric ship power systems

To support efforts in assessing the relative merit of alternative power system architectures for future naval combatants, the Electric Ship Research and Development Consortium (ESRDC) has developed notional baseline models for each of the primary candidate architectures currently considered, medium-voltage DC (MVDC), conventional 60 Hz medium-voltage (MVAC), and high-frequency medium-voltage (HFAC). Initial efforts have focused on the development of a consistent set of component models, of which the system models can be comprised, and the basic definition of the system models. The broader objectives of the consortium, however, go beyond the definition of the baseline models. The focus is on the process by which the models are implemented in software and validated, the process by which the performance of the disparate system models are objectively and quantitatively assessed and compared, and, ultimately, the process by which the relative merits of the architectures may be assessed. This paper focuses specifically on cross-platform component validation.Center for Electromechanic

Formal Executable Models for Automatic Detection of Timing Anomalies

A timing anomaly is a counterintuitive timing behavior in the sense that a local fast execution slows down an overall global execution. The presence of such behaviors is inconvenient for the WCET analysis which requires, via abstractions, a certain monotony property to compute safe bounds. In this paper we explore how to systematically execute a previously proposed formal definition of timing anomalies. We ground our work on formal designs of architecture models upon which we employ guided model checking techniques. Our goal is towards the automatic detection of timing anomalies in given computer architecture designs

From i* models to service oriented architecture models

Requirements engineering and architectural design are key activities for successful development of software systems. Specifically in the service-oriented development systems there is a gap between the requirements description and architecture design and assessment. This article presents a systematic process for systematically deriving service-oriented architecture from goal-oriented models. This process allows generate candidate architectures based on i* models and helps architects to select a solution using services oriented patterns for both services and components levels. The process is exemplified by applying it in a synthesis metadata and assembly learning objects system.Peer ReviewedPostprint (author’s final draft

MGSim - Simulation tools for multi-core processor architectures

MGSim is an open source discrete event simulator for on-chip hardware components, developed at the University of Amsterdam. It is intended to be a research and teaching vehicle to study the fine-grained hardware/software interactions on many-core and hardware multithreaded processors. It includes support for core models with different instruction sets, a configurable multi-core interconnect, multiple configurable cache and memory models, a dedicated I/O subsystem, and comprehensive monitoring and interaction facilities. The default model configuration shipped with MGSim implements Microgrids, a many-core architecture with hardware concurrency management. MGSim is furthermore written mostly in C++ and uses object classes to represent chip components. It is optimized for architecture models that can be described as process networks.Comment: 33 pages, 22 figures, 4 listings, 2 table