624 research outputs found

    Status - based routing in baggage handling systems : searching verses learning

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    This study contributes to work in baggage handling system (BHS) control, specifically dynamic bag routing. Although studies in BHS agent-based control have examined the need for intelligent control, but there has not been an effort to explore the dynamic routing problem. As such, this study provides additional insight into how agents can learn to route in a BHS. This study describes a BHS status-based routing algorithm that applies learning methods to select criteria based on routing decisions. Although numerous studies have identified the need for dynamic routing, little analytic attention has been paid to intelligent agents for learning routing tables rather than manual creation of routing rules. We address this issue by demonstrating the ability of agents to learn how to route based on bag status, a robust method that is able to function in a variety of different BHS designs.<br /

    A Systematic Survey of General Sparse Matrix-Matrix Multiplication

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    SpGEMM (General Sparse Matrix-Matrix Multiplication) has attracted much attention from researchers in fields of multigrid methods and graph analysis. Many optimization techniques have been developed for certain application fields and computing architecture over the decades. The objective of this paper is to provide a structured and comprehensive overview of the research on SpGEMM. Existing optimization techniques have been grouped into different categories based on their target problems and architectures. Covered topics include SpGEMM applications, size prediction of result matrix, matrix partitioning and load balancing, result accumulating, and target architecture-oriented optimization. The rationales of different algorithms in each category are analyzed, and a wide range of SpGEMM algorithms are summarized. This survey sufficiently reveals the latest progress and research status of SpGEMM optimization from 1977 to 2019. More specifically, an experimentally comparative study of existing implementations on CPU and GPU is presented. Based on our findings, we highlight future research directions and how future studies can leverage our findings to encourage better design and implementation.Comment: 19 pages, 11 figures, 2 tables, 4 algorithm

    A voice operated musical instrument.

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    Many mathematical formulas and algorithms exist to identify pitches formed by human voices, and this has continued to be popular in the fields of music and signal pro-cessing. Other systems and research perform real time pitch identification implemented by using PCs with system clocks faster than 400MHz. This thesis explores developing an embedded RPTI system using the average magnitude difference function (AMDF), which will also use MIDI commands to control a synthesizer to track the pitch in near real time. The AMDF algorithm was simulated and its performance analyzed in MATLAB with pre-recorded sound files from a PC. Errors inherent to the AMDF and the hardware constraints led to noticeable pitch errors. The MATLAB code was optimized and its performance verified for the Motorola 68000 assembly language. This stage of development led to realization that the original design would have to change for the processing time required for the AMDF implementation. Hardware was constructed to support an 8MHz Motorola 68000, analog input, and MIDI communications. The various modules were constructed using Vectorbord© prototyping board with soldered tracks, wires and sockets. Modules were tested individually and as a whole unit. A design flaw was noticed with the final design, which caused the unit to fail during program execution while operating in a stand-alone mode. This design is a proof of concept for a product that can be improved upon with newer components, more advanced algorithms and hardware construction, and a more aesthetically pleasing package. Ultimately, hardware limitations imposed by the available equipment in addition to a hidden design flaw contributed to the failure of this stand-alone prototype

    Industrial Wireless Sensor Networks

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    Wireless sensor networks are penetrating our daily lives, and they are starting to be deployed even in an industrial environment. The research on such industrial wireless sensor networks (IWSNs) considers more stringent requirements of robustness, reliability, and timeliness in each network layer. This Special Issue presents the recent research result on industrial wireless sensor networks. Each paper in this Special Issue has unique contributions in the advancements of industrial wireless sensor network research and we expect each paper to promote the relevant research and the deployment of IWSNs

    Studies of disk arrays tolerating two disk failures and a proposal for a heterogeneous disk array

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    There has been an explosion in the amount of generated data in the past decade. Online access to these data is made possible by large disk arrays, especially in the RAID (Redundant Array of Independent Disks) paradigm. According to the RAID level a disk array can tolerate one or more disk failures, so that the storage subsystem can continue operating with disk failure(s). RAID 5 is a single disk failure tolerant array which dedicates the capacity of one disk to parity information. The content on the failed disk can be reconstructed on demand and written onto a spare disk. However, RAID5 does not provide enough protection for data since the data loss may occur when there is a media failure (unreadable sectors) or a second disk failure during the rebuild process. Due to the high cost of downtime in many applications, two disk failure tolerant arrays, such as RAID6 and EVENODD, have become popular. These schemes use 2/N of the capacity of the array for redundant information in order to tolerate two disk failures. RM2 is another scheme that can tolerate two disk failures, with slightly higher redundancy ratio. However, the performance of these two disk failure tolerant RAID schemes is impaired, since there are two check disks to be updated for each write request. Therefore, their performance, especially when there are disk failure(s), is of interest. In the first part of the dissertation, the operations for the RAID5, RAID6, EVENODD and RM2 schemes are described. A cost model is developed for these RAID schemes by analyzing the operations in various operating modes. This cost model offers a measure of the volume of data being transmitted, and provides adevice-independent comparison of the efficiency of these RAID schemes. Based on this cost model, the maximum throughput of a RAID scheme can be obtained given detailed disk characteristic and RAID configuration. Utilizing M/G/1 queuing model and other favorable modeling assumptions, a queuing analysis to obtain the mean read response time is described. Simulation is used to validate analytic results, as well as to evaluate the RAID systems in analytically intractable cases. The second part of this dissertation describes a new disk array architecture, namely Heterogeneous Disk Array (HDA). The HDA is motivated by a few observations of the trends in storage technology. The HDA architecture allows a disk array to have two forms of heterogeneity: (1) device heterogeneity, i.e., disks of different types can be incorporated in a single HDA; and (2) RAID level heterogeneity, i.e., various RAID schemes can coexist in the same array. The goal of this architecture is (1) utilizing the extra resource (i.e. bandwidth and capacity) introduced by new disk drives in an automated and efficient way; and (2) using appropriate RAID levels to meet the varying availability requirements for different applications. In HDA, each new object is associated with an appropriate RAID level and the allocation is carried out in a way to keep disk bandwidth and capacity utilizations balanced. Design considerations for the data structures of HDA metadata are described, followed by the actual design of the data structures and flowcharts for the most frequent operations. Then a data allocation algorithm is described in detail. Finally, the HDA architecture is prototyped based on the DASim simulation toolkit developed at NJIT and simulation results of an HDA with two RAID levels (RAID 1 and RAIDS) are presented

    Optimization and Applications of Modern Wireless Networks and Symmetry

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    Due to the future demands of wireless communications, this book focuses on channel coding, multi-access, network protocol, and the related techniques for IoT/5G. Channel coding is widely used to enhance reliability and spectral efficiency. In particular, low-density parity check (LDPC) codes and polar codes are optimized for next wireless standard. Moreover, advanced network protocol is developed to improve wireless throughput. This invokes a great deal of attention on modern communications

    Topics in random graphs, combinatorial optimization, and statistical inference

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    The manuscript is made of three chapters presenting three differenttopics on which I worked with Ph.D. students. Each chapter can be read independently of the others andshould be relatively self-contained. Chapter 1 is a gentle introduction to the theory of random graphswith an emphasis on contagions on such networks. In Chapter 2, I explain the main ideas of the objectivemethod developed by Aldous and Steele applied to the spectral measure of random graphs and themonomer-dimer problem. This topic is dear to me and I hope that this chapter will convince the readerthat it is an exciting field of research. Chapter 3 deals with problems in high-dimensional statistics whichnow occupy a large proportion of my time. Unlike Chapters 1 and 2 which could be easily extended inlecture notes, I felt that the material in Chapter 3 was not ready for such a treatment. This field ofresearch is currently very active and I decided to present two of my recent contributions
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