Introduction to Graphene Electronics -- A New Era of Digital Transistors and Devices

The speed of silicon-based transistors has reached an impasse in the recent decade, primarily due to scaling techniques and the short-channel effect. Conversely, graphene (a revolutionary new material possessing an atomic thickness) has been shown to exhibit a promising value for electrical conductivity. Graphene would thus appear to alleviate some of the drawbacks associated with silicon-based transistors. It is for this reason why such a material is considered one of the most prominent candidates to replace silicon within nano-scale transistors. The major crux here, is that graphene is intrinsically gapless, and yet, transistors require a band-gap pertaining to a well-defined ON/OFF logical state. Therefore, exactly as to how one would create this band-gap in graphene allotropes is an intensive area of growing research. Existing methods include nano-ribbons, bilayer and multi-layer structures, carbon nanotubes, as well as the usage of the graphene substrates. Graphene transistors can generally be classified according to two working principles. The first is that a single graphene layer, nanoribbon or carbon nanotube can act as a transistor channel, with current being transported along the horizontal axis. The second mechanism is regarded as tunneling, whether this be band-to-band on a single graphene layer, or vertically between adjacent graphene layers. The high-frequency graphene amplifier is another talking point in recent research, since it does not require a clear ON/OFF state, as with logical electronics. This paper reviews both the physical properties and manufacturing methodologies of graphene, as well as graphene-based electronic devices, transistors, and high-frequency amplifiers from past to present studies. Finally, we provide possible perspectives with regards to future developments.Comment: This is an updated version of our review article, due to be published in Contemporary Physics (Sept 2013). Included are updated references, along with a few minor corrections. (45 pages, 19 figures

Application of Graphene within Optoelectronic Devices and Transistors

Scientists are always yearning for new and exciting ways to unlock graphene's true potential. However, recent reports suggest this two-dimensional material may harbor some unique properties, making it a viable candidate for use in optoelectronic and semiconducting devices. Whereas on one hand, graphene is highly transparent due to its atomic thickness, the material does exhibit a strong interaction with photons. This has clear advantages over existing materials used in photonic devices such as Indium-based compounds. Moreover, the material can be used to 'trap' light and alter the incident wavelength, forming the basis of the plasmonic devices. We also highlight upon graphene's nonlinear optical response to an applied electric field, and the phenomenon of saturable absorption. Within the context of logical devices, graphene has no discernible band-gap. Therefore, generating one will be of utmost importance. Amongst many others, some existing methods to open this band-gap include chemical doping, deformation of the honeycomb structure, or the use of carbon nanotubes (CNTs). We shall also discuss various designs of transistors, including those which incorporate CNTs, and others which exploit the idea of quantum tunneling. A key advantage of the CNT transistor is that ballistic transport occurs throughout the CNT channel, with short channel effects being minimized. We shall also discuss recent developments of the graphene tunneling transistor, with emphasis being placed upon its operational mechanism. Finally, we provide perspective for incorporating graphene within high frequency devices, which do not require a pre-defined band-gap.Comment: Due to be published in "Current Topics in Applied Spectroscopy and the Science of Nanomaterials" - Springer (Fall 2014). (17 pages, 19 figures

Physical Modeling of Graphene Nanoribbon Field Effect Transistor Using Non-Equilibrium Green Function Approach for Integrated Circuit Design

The driving engine for the exponential growth of digital information processing systems is scaling down the transistor dimensions. For decades, this has enhanced the device performance and density. However, the International Technology Roadmap for Semiconductors (ITRS) states the end of Moore’s law in the next decade due to the scaling challenges of silicon-based CMOS electronics, e.g. extremely high power density. The forward-looking solutions are the utilization of emerging materials and devices for integrated circuits. The Ph.D. dissertation focuses on graphene, one atomic layer of carbon sheet, experimentally discovered in 2004. Since fabrication technology of emerging materials is still in early stages, transistor modeling has been playing an important role for evaluating futuristic graphene-based devices and circuits. The GNR FET has been simulated by solving a numerical quantum transport model based on self-consistent solution of the 3D Poisson equation and 1D Schrödinger equations within the non-equilibrium Green’s function (NEGF) formalism. The quantum transport model fully treats short channel-length electrostatic effects and the quantum tunneling effects, leading to the technology exploration of graphene nanoribbon field effect transistors (GNRFETs) for the future. A comprehensive study of static metrics and switching attributes of GNRFET has been presented including the performance dependence of device characteristics to the GNR width and the scaling of its channel length down to 2.5 nanometer. It has been found that increasing the GNR width deteriorate the off-state performance of the GNRFET, such that, narrower armchair GNRs improved the device robustness to short channel effects, leading to better off-state performance considering smaller off-current, larger ION/IOFF ratio, smaller subthreshold swing and smaller drain-induced barrier-lowering. The wider armchair GNRs allow the scaling of channel length and supply voltage resulting in better on-state performance such as higher drive current, smaller intrinsic gate-delay time and smaller power-delay product. In addition, the width-dependent characteristics of GNR FETs is investigated for two GNR semiconducting families (3p,0) and (3p+1,0). It has been found that the GNRs(3p+1,0) demonstrates superior off-state performance, while, on the other hand, GNRs(3p,0) shows superior on-state performance. Thus, GNRs(3p+1,0) are promising for low-power design, while GNRs(3p,0) indicate a more preferable attribute for high frequency applications

Modeling Of Two Dimensional Graphene And Non-graphene Material Based Tunnel Field Effect Transistors For Integrated Circuit Design

The Moore’s law of scaling of metal oxide semiconductor field effect transistor (MOSFET) had been a driving force toward the unprecedented advancement in development of integrated circuit over the last five decades. As the technology scales down to 7 nm node and below following the Moore’s law, conventional MOSFETs are becoming more vulnerable to extremely high off-state leakage current exhibiting a tremendous amount of standby power dissipation. Moreover, the fundamental physical limit of MOSFET of 60 mV/decade subthreshold slope exacerbates the situation further requiring current transport mechanism other than drift and diffusion for the operation of transistors. One way to limit such unrestrained amount of power dissipation is to explore novel materials with superior thermal and electrical properties compared to traditional bulk materials. On the other hand, energy efficient steep subthreshold slope devices are the other possible alternatives to conventional MOSFET based on emerging novel materials. This dissertation addresses the potential of both advanced materials and devices for development of next generation energy efficient integrated circuits. Among the different steep subthreshold slope devices, tunnel field effect transistor (TFET) has been considered as a promising candidate after MOSFET. A superior gate control on source-channel band-to-band tunneling providing subthreshold slopes well below than 60 mV/decade. With the emergence of atomically thin two-dimensional (2D) materials, interest in the design of TFET based on such novel 2D materials has also grown significantly. Graphene being the first and the most studied among 2D materials with exotic electronic and thermal properties. This dissertation primarily considers current transport modeling of graphene based tunnel devices from transport phenomena to energy efficient integrated circuit design. Three current transport models: semi-classical, semi-quantum and numerical simulations are described for the modeling of graphene nanoribbon tunnel field effect transistor (GNR TFET) where the semi-classical model is in close agreement with the quantum transport simulation. Moreover, the models produced are also extended for integrated circuit design using Verilog-A hardware description language for logic design. In order to overcome the challenges associated with the band gap engineering for making graphene transistor for logic operation, the promise of graphene based interlayer tunneling transistors are discussed along with their existing fundamental physical limitation of subthreshold slope. It has been found that such interlayer tunnel transistor has very poor electrostatic gate control on drain current. It gives subthreshold slope greater than the thermionic limit of 60 mV/decade at room temperature. In order to resolve such limitation of interlayer tunneling transistors, a new type of transistor named “junctionless tunnel effect transistor (JTET)” has been invented and modeled for the first time considering graphene-boron nitride (BN)-graphene and molybdenum disulfide (MoS2)-boron nitride (BN) heterostructures, where the interlayer tunneling mechanism controls the source-drain ballistic transport instead of depleting carriers in the channel. Steep subthreshold slope, low power and high frequency THz operation are few of the promising features studied for such graphene and MoS2 JTETs. From current transport modeling to energy efficient integrated circuit design using Verilog-A has been carried out for these new devices as well. Thus, findings in this dissertation would suggest the exciting opportunity of a new class of next generation energy efficient material based transistors as switches

Electron transport in molecular nanostructures

The past decades have seen huge efforts in trying to integrate carbon nanomaterials into electronic devices. Although microelectronic processors running on carbon nanotubes have demonstrated excellent performance and low power consumption, there are still limitations inherent to these materials, which restrict their applicability and integrability into devices. The lack of a bandgap in graphene, the mixture of metallic and semiconducting behaviours in carbon nanotubes, and tendency of nanotube to aggregate, are some examples of why it is necessary to devise alternative carbon nanostructures. In this thesis, I investigate the electronic properties of nanodevices where molecularly defined graphene nanoribbons have been integrated as functional elements. These systems offer several advantages: they are intrinsically semiconducting, with atomically precise topology that guarantees, in principle, low scattering and ultraclean behaviour, as well as access to topological states. On the other hand, their integration into devices is just in its infancy. After detailing the background of these systems, and of the most advanced devices that can be created out of them, I will describe the instrumentation and device architectures used to measure the electronic-transport properties. I then demonstrate a molecular quantum singleelectron transistor that can work up to room temperature, and detail the transport regimes that appear in the different temperature regions. These findings are not only the first observation of quantum operation at room temperature in a molecular structure, but also clarify the physics of how such devices work. I then address the second issue that has plagued devices based on carbon nanotubes: the presence of aggregates that can compromise, by intermolecular forces, device performance. I demonstrate how chemical functionalisation of the edges by the appropriate side groups can overcome these issues, allowing us to produce some the cleanest electronic nanodevices and features of single-electron transport, ever obtained. The clarity of the transport features is comparable of what has been seen for carbon nanotubes after more than 10 years of efforts, and allow us to address fundamental interactions that can regulate the transport, such as the electron–vibration coupling. I observe very strong vibronic coupling, with clear features of a Franck–Condon blockade. Eventually I examine how to control the chemical potential of molecular nanoribbons, and dope them at will. This is first addressed by investigating dopant groups attached to the ribbon edges. The energy shift induced in the nanoribbons by the dopant is, however, weak and impractical at the device level. I then present measurements in the first field-effect transistor of a unique class of materials, where dopants and metal atoms are inserted directly into the honeycomb lattice, and I propose possible improvements. These results offer a first step towards the realisation of practical and extremely clean electronic devices based on molecular nanoribbons. They thus open the path to the use of electronics for the investigation of spin states, topological effects, and the physics of quantum systems at high temperatures. They offer a picture of the transport mechanisms at play, and, from the practical level, offer the first recipes to overcome longstanding issues that have hindered the development of carbon-based electronic devices, and may thus be instrumental in the development of the first nanoribbon-based microprocessors