Low Power Decoding Circuits for Ultra Portable Devices

A wide spread of existing and emerging battery driven wireless devices do not necessarily demand high data rates. Rather, ultra low power, portability and low cost are the most desired characteristics. Examples of such applications are wireless sensor networks (WSN), body area networks (BAN), and a variety of medical implants and health-care aids. Being small, cheap and low power for the individual transceiver nodes, let those to be used in abundance in remote places, where access for maintenance or recharging the battery is limited. In such scenarios, the lifetime of the battery, in most cases, determines the lifetime of the individual nodes. Therefore, energy consumption has to be so low that the nodes remain operational for an extended period of time, even up to a few years. It is known that using error correcting codes (ECC) in a wireless link can potentially help to reduce the transmit power considerably. However, the power consumption of the coding-decoding hardware itself is critical in an ultra low power transceiver node. Power and silicon area overhead of coding-decoding circuitry needs to be kept at a minimum in the total energy and cost budget of the transceiver node. In this thesis, low power approaches in decoding circuits in the framework of the mentioned applications and use cases are investigated. The presented work is based on the 65nm CMOS technology and is structured in four parts as follows: In the first part, goals and objectives, background theory and fundamentals of the presented work is introduced. Also, the ECC block in coordination with its surrounding environment, a low power receiver chain, is presented. Designing and implementing an ultra low power and low cost wireless transceiver node introduces challenges that requires special considerations at various levels of abstraction. Similarly, a competitive solution often occurs after a conclusive design space exploration. The proposed decoder circuits in the following parts are designed to be embedded in the low power receiver chain, that is introduced in the first part. Second part, explores analog decoding method and its capabilities to be embedded in a compact and low power transceiver node. Analog decod- ing method has been theoretically introduced over a decade ago that followed with early proof of concept circuits that promised it to be a feasible low power solution. Still, with the increased popularity of low power sensor networks, it has not been clear how an analog decoding approach performs in terms of power, silicon area, data rate and integrity of calculations in recent technologies and for low data rates. Ultra low power budget, small size requirement and more relaxed demands on data rates suggests a decoding circuit with limited complexity. Therefore, the four-state (7,5) codes are considered for hardware implementation. Simulations to chose the critical design factors are presented. Consequently, to evaluate critical specifications of the decoding circuit, three versions of analog decoding circuit with different transistor dimensions fabricated. The measurements results reveal different trade-off possibilities as well as the potentials and limitations of the analog decoding approach for the target applications. Measurements seem to be crucial, since the available computer-aided design (CAD) tools provide limited assistance and precision, given the amount of calculations and parameters that has to be included in the simulations. The largest analog decoding core (AD1) takes 0.104mm2 on silicon and the other two (AD2 and AD3) take 0.035mm2 and 0.015mm2, respectively. Consequently, coding gain in trade-off with silicon area and throughput is presented. The analog decoders operate with 0.8V supply. The achieved coding gain is 2.3 dB at bit error rates (BER)=0.001 and 10 pico-Joules per bit (pJ/b) energy efficiency is reached at 2 Mbps. Third part of this thesis, proposes an alternative low power digital decoding approach for the same codes. The desired compact and low power goal has been pursued by designing an equivalent digital decoding circuit that is fabricated in 65nm CMOS technology and operates in low voltage (near-threshold) region. The architecture of the design is optimized in system and circuit levels to propose a competitive digital alternative. Similarly, critical specifications of the decoder in terms of power, area, data rate (speed) and integrity are reported according to the measurements. The digital implementation with 0.11mm2 area, consumes minimum energy at 0.32V supply which gives 9 pJ/b energy efficiency at 125 kb/s and 2.9 dB coding gain at BER=0.001. The forth and last part, compares the proposed design alternatives based on the fabricated chips and the results attained from the measurements to conclude the most suitable solution for the considered target applications. Advantages and disadvantages of both approaches are discussed. Possible extensions of this work is introduced as future work

Power Management Circuits for Low-Power RF Energy Harvesters

The paper describes the design and implementation of power management circuits for RF energy harvesters suitable for integration in wireless sensor nodes. In particular, we report the power management circuits used to provide the voltage supply of an integrated temperature sensor with analog-to-digital converter. A DC-DC boost converter is used to transfer efficiently the energy harvested from a generic radio-frequency rectifier into a charge reservoir, whereas a linear regulator scales the voltage supply to a suitable value for a sensing and conversion circuit. Implemented in a 65 nm CMOS technology, the power management system achieves a measured overall efficiency of 20%, with an available power of 4.5 μW at the DC-DC converter input. The system can sustain a temperature measurement rate of one sample/s with an RF input power of −28 dBm, making it compatible with the power levels available in generic outdoor environments

An ultra wide temperature range R-2R based 8 bit D/A converter for 90nm CMOS technology

Digital-to-analog converters have a wide range of applications from converting stored digital/audio signals to data processing and to data acquisition systems. Another application area could be a supporting building block in either cooled or un-cooled Read-out integrated circuits (ROICs). For this aspect, the capability of ultra wide temperature range operation may prove useful providing freedom to the designer and the consumer. In this thesis, design of an 8-bit, fully binary R-2R based digital-to-analog converter is realized with 90nm CMOS technology to operate in a wide temperature range (-200°C to 120°C) to be used in an ongoing Digital Read-out Integrated Circuit (DROIC) for infrared (IR) imaging systems. UWT range of operation is obtained via a temperature compensated voltage reference generator circuit consisting of only MOSFETs. In order to aid the matching of the resistors, a common-centroid layout technique is applied to the resistor core of the circuit which eliminates the process gradients. TSMC's 90nm 1 poly, 9 metal Mixed – Signal RF technology and a power supply of 1.2V are used for this design. For accuracy, the best performance is obtained at the room temperature where the fastest operation is possible at cryogenic temperatures at the expense of precision. It has a DNL and INL of ±0.3LSB at room temperature and ±0.45LSB at 120°C. The DAC can operate up to 20MHz. The circuit dissipates only 0.43mW in full scale range at cryogenic temperatures where 1.1mW at room. It occupies a chip area of only 0.015mm2 [square millimetre]

Ultra low power circuits for a miniature apnoea detection device

Imperial Users onl

A leaky waveguide all-optical analog-to-digital converter

In this thesis we describe a novel all-optical analog-to-digital converter (AOADC) based on a leaky waveguide deflector. The principle of the spatial sampling AOADC is to convert an electrical signal to its corresponding optical deflection angle and then sample and quantize this angle in the spatial domain, instead of the amplitude domain. This AOADC is designed for broadband digital receivers working at frequencies above 20 GHz (a minimum 40 GS/s sampling rate) and provides a resolution higher than 6 bits. An original design based on GRISM (Grating and pRISM) is investigated for a high-resolution ADC implementation; and its challenges have been identified. The investigation provides a general model of spatial sampling AOADCs and highlights their advantages of immunity to optical intensity fluctuation. Later we proposed an AOADC that employs a leaky waveguide structure that is different from any other optical ADC. The AOADC consists of a sampler based on a mode-locked laser and a leaky waveguide deflector driven by traveling wave electrodes, a quantizer based on an integrated optical collector array and broadband photodetectors. These components provide the AOADC with a higher deflection angle and angular resolution resulting in high bit resolution without consuming significant power. The quantization of the deflection angle is done by a simple spatial quantizer that digitizes as well as encodes the signal simultaneously. A detailed design of the E-O deflector and the spatial quantizer has been analyzed and simulated; and some preliminary tests have been conducted. This thesis summarizes our contributions in designing and modeling this novel spatial sampling AOADC.Ph.D., Electrical Engineering -- Drexel University, 200

Simulation and Design of an UWB Imaging System for Breast Cancer Detection

Breast cancer is the most frequently diagnosed cancer among women. In recent years, the mortality rate due to this disease is greatly decreased thanks to both enormous progress in cancer research, and screening campaigns which have allowed the increase in the number of early diagnoses of the disease. In fact, if the tumor is identied in its early stage, e.g. when it has a diameter of less than one centimeter, the possibility of a cure can reach 93%. However, statistics show that more young aged women are suered breast cancer. The goal of screening exams for early breast cancer detection is to nd cancers before they start to cause symptoms. Regular mass screening of all women at risk is a good option to achieve that. Instead of meeting very high diagnostic standards, it is expected to yield an early warning, not a denitive diagnosis. In the last decades, X-ray mammography is the most ecient screening technique. However, it uses ionizing radiation and, therefore, should not be used for frequent check-ups. Besides, it requires signicant breast compression, which is often painful. In this scenario many alternative technologies were developed to overcome the limitations of mammography. Among these possibilities, Magnetic Resonance Imaging (MRI) is too expensive and time-consuming, Ultrasound is considered to be too operatordependent and low specicity, which are not suitable for mass screening. Microwave imaging techniques, especially Ultra WideBand (UWB) radar imaging, is the most interesting one. The reason of this interest relies on the fact that microwaves are non-ionizing thus permitting frequent examinations. Moreover, it is potentially lowcost and more ecient for young women. Since it has been demonstrated in the literatures that the dielectric constants between cancerous and healthy tissues are quite dierent, the technique consists in illuminating these biological tissues with microwave radiations by one or more antennas and analyzing the re ected signals. An UWB imaging system consists of transmitters, receivers and antennas for the RF part, the transmission channel and of a digital backend imaging unit for processing the received signals. When an UWB pulse strikes the breast, the pulse is re ected due to the dielectric discontinuity in tissues, the bigger the dierence, the bigger the backscatter. The re ected signals are acquired and processed to create the energy maps. This thesis aims to develop an UWB system at high resolution for the detection of carcinoma breast already in its initial phase. To favor the adoption of this method in screening campaigns, it is necessary to replace the expensive and bulky RF instrumentation used so far with ad-hoc designed circuits and systems. In order to realize that, at the very beginning, the overall system environment must be built and veried, which mainly consists of the transmission channel{the breast model and the imaging unit. The used transmission channel data come from MRI of the prone patient. In order to correctly use this numerical model, a simulator was built, which was implemented in Matlab, according to the Finite-Dierence-Time- Domain (FDTD) method. FDTD algorithm solves the electric and magnetic eld both in time and in space, thus, simulates the propagation of electromagnetic waves in the breast model. To better understand the eect of the system non-idealities, two 2D breast models are investigated, one is homogeneous, the other is heterogeneous. Moreover, the modeling takes into account all critical aspects, including stability and medium dispersion. Given the types of tissues under examination, the frequency dependence of tissue dielectric properties is incorporated into wideband FDTD simulations using Debye dispersion parameters. A performed further study is in the implementation of the boundary conditions. The Convolution Perfectly Matched Layer (CPML) is used to implement the absorbing boundaries. The objective of the imaging unit is to obtain an energy map representing the amount of energy re ected from each point of the breast, by recombining the sampled backscattered signals. For this purpose, the study has been carried out on various beamforming in the literature. The basic idea is called as "delay and sum", which is to align the received signals in such a way as to focus a given point in space and then add up all the contributions, so as to obtain a constructive interference at that point if this is a diseased tissue. In this work, Microwave Imaging via Space Time (MIST) Beamforming algorithm is applied, which is based on the above principle and add more elaborations of the signals in order to make the algorithm less sensitive to propagation phenomena in the medium and to the non-idealities of the system. It is divided into two distinct steps: the rst step, called SKin Artifact Removal (SKAR), takes care of removing the contributions from the signal caused by the direct path between the transmitter and receiver, the re ection of skin, as they are orders of magnitude higher compared to the re ections caused by cancers; the second step, which is BEAmForming (BEAF), performs the algorithm of reconstruction by forming a weighted combination of time delayed version of the calibrated re ected signals. As discussed above, more attention must be paid on the implementation of the ad-hoc integration circuits. In this scenario, due to the strict requirements on the RF receiver component, two dierent approaches of the implementation of the RF front-end, Direct Conversion (DC) receiver and Coherent Equivalent Time Sampling (CETS) receiver are compared. They are modeled behaviorally and the eects of various impairments, such as thermal, jitter, and phase noise, as well as phase inaccuracies, non-linearity, ADC quantization noise and distortion, on energy maps and on quantitative metrics such as SCR and SMR are evaluated. Dierential Gaussian pulse is chosen as the exciting source. Results show that DC receiver performs higher sensitivity to phase inaccuracies, which makes it less robust than the CETS receiver. Another advantage of the CETS receiver is that it can work in time domain with UWB pulses, other than in frequency domain with stepped frequency continuous waves like the DC one, which reduces the acquisition time without impacting the performance. Based on the results of the behavioral simulations, low noise amplier (LNA) and Track and Hold Amplier (THA) can be regarded as the most critical parts for the proposed CETS receiver, as well as the UWB antenna. This work therefore focuses on their hardware implementations. The LNA, which shows critical performance limitation at bandwidth and noise gure of receiver, has been developed based on common-gate conguration. And the THA based on Switched Source Follower (SSF) scheme has been presented and improved to obtain high input bandwidth, high sampling rate, high linearity and low power consumption. LNA and THA are implemented in CMOS 130nm technology and the circuit performance evaluation has been taken place separately and together. The small size UWB wide-slot antenna is designed and simulated in HFSS. Finally, in order to evaluate the eect of the implemented transistor level components on system performance, a multi-resolution top-down system methodology is applied. Therfore, the entire ow is analyzed for dierent levels of the RF frontend. Initially the system components are described behaviorally as ideal elements. The main activity consists in the analysis and development of the entire frontend system, observing and complementing each other blocks in a single ow simulation, clear and well-dened in its various interfaces. To achieve that the receiver is modeled and analyzed using VHDL-AMS language block by block, moreover, the impact of quantization, noise, jitter, and non-linearity is also evaluated. At last, the behavioral description of antenna, LNA and THA is replaced with a circuit-level one without changing the rest of the system, which permits a system-level assessment of low-level issues

A low-power analog logarithmic map circuit with offset and temperature compensation for use in bionic ears

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002.Includes bibliographical references (p. 74-75).This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.Logarithmic map circuits are useful in many applications that require non-linear signal compression, such as in speech recognition and cochlear implants. A logarithmic current-mode A/D converter with temperature compensation and automatic offset calibration is presented in this paper. It employs a dual-slope, auto-zeroing topology with a 60 dB dynamic range and 300 Hz sampling rate, for capturing the envelope of speech signals in a bionic ear. Fabricated in a 1.5 [mu]m process, the circuit consumes only 1 [mu]W of analog power and another 1 [mu]W of digital power, and can therefore run for over 50 years on just a couple of AA batteries. At the current level of power consumption, we have proven that this design is thermal-noise limited to a 6-bit precision, and higher precision is possible only if we expend more power. As such, it is already useful for cochlear implants, as deaf patients can only discriminate 1 dB out of a 30 dB dynamic range in the auditory nerve bundles. For the purpose of using this circuit in other applications, we conclude with several strategies that can increase the precision without hurting the power consumption.by Ji-Jon Sit.S.M

OPTIMAL CONTROL OF OBJECTS ON THE MICRO- AND NANO-SCALE BY ELECTROKINETIC AND ELECTROMAGNETIC MANIPULATION: FOR BIO-SAMPLE PREPARATION, QUANTUM INFORMATION DEVICES AND MAGNETIC DRUG DELIVERY

In this thesis I show achievements for precision feedback control of objects inside micro-fluidic systems and for magnetically guided ferrofluids. Essentially, this is about doing flow control, but flow control on the microscale, and further even to nanoscale accuracy, to precisely and robustly manipulate micro and nano-objects (i.e. cells and quantum dots). Target applications include methods to miniaturize the operations of a biological laboratory (lab-on-a-chip), i.e. presenting pathogens to on-chip sensing cells or extracting cells from messy bio-samples such as saliva, urine, or blood; as well as non-biological applications such as deterministically placing quantum dots on photonic crystals to make multi-dot quantum information systems. The particles are steered by creating an electrokinetic fluid flow that carries all the particles from where they are to where they should be at each time step. The control loop comprises sensing, computation, and actuation to steer particles along trajectories. Particle locations are identified in real-time by an optical system and transferred to a control algorithm that then determines the electrode voltages necessary to create a flow field to carry all the particles to their next desired locations. The process repeats at the next time instant. I address following aspects of this technology. First I explain control and vision algorithms for steering single and multiple particles, and show extensions of these algorithms for steering in three dimensional (3D) spaces. Then I show algorithms for calculating power minimum paths for steering multiple particles in actuation constrained environments. With this microfluidic system I steer biological cells and nano particles (quantum dots) to nano meter precision. In the last part of the thesis I develop and experimentally demonstrate two dimensional (2D) manipulation of a single droplet of ferrofluid by feedback control of 4 external electromagnets, with a view towards enabling feedback control of magnetic drug delivery to reach deeper tumors in the long term. To this end, I developed and experimentally demonstrated an optimal control algorithm to effectively manipulate a single ferrofluid droplet by magnetic feedback control. This algorithm was explicitly designed to address the nonlinear and cross-coupled nature of dynamic magnetic actuation and to best exploit available electromagnetic forces for the applications of magnetic drug delivery

CMOS Hyperbolic Sine ELIN filters for low/audio frequency biomedical applications

Hyperbolic-Sine (Sinh) filters form a subclass of Externally-Linear-Internally-Non- Linear (ELIN) systems. They can handle large-signals in a low power environment under half the capacitor area required by the more popular ELIN Log-domain filters. Their inherent class-AB nature stems from the odd property of the sinh function at the heart of their companding operation. Despite this early realisation, the Sinh filtering paradigm has not attracted the interest it deserves to date probably due to its mathematical and circuit-level complexity. This Thesis presents an overview of the CMOS weak inversion Sinh filtering paradigm and explains how biomedical systems of low- to audio-frequency range could benefit from it. Its dual scope is to: consolidate the theory behind the synthesis and design of high order Sinh continuous–time filters and more importantly to confirm their micro-power consumption and 100+ dB of DR through measured results presented for the first time. Novel high order Sinh topologies are designed by means of a systematic mathematical framework introduced. They employ a recently proposed CMOS Sinh integrator comprising only p-type devices in its translinear loops. The performance of the high order topologies is evaluated both solely and in comparison with their Log domain counterparts. A 5th order Sinh Chebyshev low pass filter is compared head-to-head with a corresponding and also novel Log domain class-AB topology, confirming that Sinh filters constitute a solution of equally high DR (100+ dB) with half the capacitor area at the expense of higher complexity and power consumption. The theoretical findings are validated by means of measured results from an 8th order notch filter for 50/60Hz noise fabricated in a 0.35μm CMOS technology. Measured results confirm a DR of 102dB, a moderate SNR of ~60dB and 74μW power consumption from 2V power supply