6 research outputs found

    Live demonstration: a public engagement platform for invasive neural interfaces

    Get PDF
    Neural interfaces, and more specifically ones ofthe invasive/implantable variety, today are a topic of muchcontroversy, often making the general public uncomfortable andintimidated. We have thus devised a bespoke interactive demoto help people understand brain implants and their need inthe age of wearable devices, with the secondary objective ofintroducing the wireless cortical neural probe that we, at NGNI(Next Generation Neural Interfaces) lab, are developing

    Calibration-free and hardware-efficient neural spike detection for brain machine interfaces

    Get PDF
    Recent translational efforts in brain-machine interfaces (BMI) are demonstrating the potential to help people with neurological disorders. The current trend in BMI technology is to increase the number of recording channels to the thousands, resulting in the generation of vast amounts of raw data. This in turn places high bandwidth requirements for data transmission, which increases power consumption and thermal dissipation of implanted systems. On-implant compression and/or feature extraction are therefore becoming essential to limiting this increase in bandwidth, but add further power constraints – the power required for data reduction must remain less than the power saved through bandwidth reduction. Spike detection is a common feature extraction technique used for intracortical BMIs. In this paper, we develop a novel firing-rate-based spike detection algorithm that requires no external training and is hardware efficient and therefore ideally suited for real-time applications. Key performance and implementation metrics such as detection accuracy, adaptability in chronic deployment, power consumption, area utilization, and channel scalability are benchmarked against existing methods using various datasets. The algorithm is first validated using a reconfigurable hardware (FPGA) platform and then ported to a digital ASIC implementation in both 65 nm and 0.18MU m CMOS technologies. The 128-channel ASIC design implemented in a 65 nm CMOS technology occupies 0.096 mm2 silicon area and consumes 4.86MU W from a 1.2 V power supply. The adaptive algorithm achieves a 96% spike detection accuracy on a commonly used synthetic dataset, without the need for any prior training

    jULIEs: nanostructured polytrodes for low traumatic extracellular recordings and stimulation in the mammalian brain

    Get PDF
    Objective.Extracellular microelectrode techniques are the most widely used approach to interrogate neuronal populations. However, regardless of the manufacturing method used, damage to the vasculature and circuit function during probe insertion remains a concern. This issue can be mitigated by minimising the footprint of the probe used. Reducing the size of probes typically requires either a reduction in the number of channels present in the probe, or a reduction in the individual channel area. Both lead to less effective coupling between the probe and extracellular signals of interest.Approach.Here, we show that continuously drawn SiO2-insulated ultra-microelectrode fibres offer an attractive substrate to address these challenges. Individual fibres can be fabricated to >10 m continuous stretches and a selection of diameters below 30µm with low resistance (<100 Ω mm-1) continuously conductive metal core of <10µm and atomically flat smooth shank surfaces. To optimize the properties of the miniaturised electrode-tissue interface, we electrodeposit rough Au structures followed by ∼20 nm IrOx film resulting in the reduction of the interfacial impedance to <500 kΩ at 1 kHz.Main results. We demonstrate that these ultra-low impedance electrodes can record and stimulate both single and multi-unit activity with minimal tissue disturbance and exceptional signal-to-noise ratio in both superficial (∼40µm) and deep (∼6 mm) structures of the mouse brain. Further, we show that sensor modifications are stable and probe manufacturing is reproducible.Significance.Minimally perturbing bidirectional neural interfacing can reveal circuit function in the mammalian brainin vivo

    Biointegrated and wirelessly powered implantable brain devices: a review

    Get PDF
    Implantable neural interfacing devices have added significantly to neural engineering by introducing the low-frequency oscillations of small populations of neurons known as local field potential as well as high-frequency action potentials of individual neurons. Regardless of the astounding progression as of late, conventional neural modulating system is still incapable to achieve the desired chronic in vivo implantation. The real constraint emerges from mechanical and physical diffierences between implants and brain tissue that initiates an inflammatory reaction and glial scar formation that reduces the recording and stimulation quality. Furthermore, traditional strategies consisting of rigid and tethered neural devices cause substantial tissue damage and impede the natural behaviour of an animal, thus hindering chronic in vivo measurements. Therefore, enabling fully implantable neural devices, requires biocompatibility, wireless power/data capability, biointegration using thin and flexible electronics, and chronic recording properties. This paper reviews biocompatibility and design approaches for developing biointegrated and wirelessly powered implantable neural devices in animals aimed at long-term neural interfacing and outlines current challenges toward developing the next generation of implantable neural devices

    Resource-Constrained Acquisition Circuits for Next Generation Neural Interfaces

    Get PDF
    The development of neural interfaces allowing the acquisition of signals from the cortex of the brain has seen an increasing amount of interest both in academic research as well as in the commercial space due to their ability to aid people with various medical conditions, such as spinal cord injuries, as well as their potential to allow more seamless interactions between people and machines. While it has already been demonstrated that neural implants can allow tetraplegic patients to control robotic arms, thus to an extent returning some motoric function, the current state of the art often involves the use of heavy table-top instruments connected by wires passing through the patient’s skull, thus making the applications impractical and chronically infeasible. Those limitations are leading to the development of the next generation of neural interfaces that will overcome those issues by being minimal in size and completely wireless, thus paving a way to the possibility of their chronic application. Their development however faces several challenges in numerous aspects of engineering due to constraints presented by their minimal size, amount of power available as well as the materials that can be utilised. The aim of this work is to explore some of those challenges and investigate novel circuit techniques that would allow the implementation of acquisition analogue front-ends under the presented constraints. This is facilitated by first giving an overview of the problematic of recording electrodes and their electrical characterisation in terms of their impedance profile and added noise that can be used to guide the design of analogue front-ends. Continuous time (CT) acquisition is then investigated as a promising signal digitisation technique alternative to more conventional methods in terms of its suitability. This is complemented by a description of practical implementations of a CT analogue-to-digital converter (ADC) including a novel technique of clockless stochastic chopping aimed at the suppression of flicker noise that commonly affects the acquisition of low-frequency signals. A compact design is presented, implementing a 450 nW, 5.5 bit ENOB CT ADC, occupying an area of 0.0288 mm2 in a 0.18 μm CMOS technology, making this the smallest presented design in literature to the best of our knowledge. As completely wireless neural implants rely on power delivered through wireless links, their supply voltage is often subject to large high frequency variations as well voltage uncertainty making it necessary to design reference circuits and voltage regulators providing stable reference voltage and supply in the constrained space afforded to them. This results in numerous challenges that are explored and a design of a practical implementation of a reference circuit and voltage regulator is presented. Two designs in a 0.35 μm CMOS technology are presented, showing respectively a measured PSRR of ≈60 dB and ≈53 dB at DC and a worst-case PSRR of ≈42 dB and ≈33 dB with a less than 1% standard deviation in the output reference voltage of 1.2 V while consuming a power of ≈7 μW. Finally, ΣΔ modulators are investigated for their suitability in neural signal acquisition chains, their properties explained and a practical implementation of a ΣΔ DC-coupled neural acquisition circuit presented. This implements a 10-kHz, 40 dB SNDR ΣΔ analogue front-end implemented in a 0.18 μm CMOS technology occupying a compact area of 0.044 μm2 per channel while consuming 31.1 μW per channel.Open Acces

    Towards a distributed, chronically-implantable neural interface

    No full text
    We present a platform technology encompassing a family of innovations that together aim to tackle key challenges with existing implantable brain machine interfaces. The ENGINI (Empowering Next Generation Implantable Neural Interfaces) platform utilizes a 3-tier network (external processor, cranial transponder, intracortical probes) to inductively couple power to, and communicate data from, a distributed array of freely-floating mm-scale probes. Novel features integrated into each probe include: (1) an array of niobium microwires for observing local field potentials (LFPs) along the cortical column; (2) ultra-low power instrumentation for signal acquisition and data reduction; (3) an autonomous, self-calibrating wireless transceiver for receiving power and transmitting data; and (4) a hermetically-sealed micropackage suitable for chronic use. We are additionally engineering a surgical tool, to facilitate manual and robot-assisted insertion, within a streamlined neurosurgical workflow. Ongoing work is focused on system integration and preclinical testing
    corecore