18,844 research outputs found
Inference of Sparse Networks with Unobserved Variables. Application to Gene Regulatory Networks
Networks are a unifying framework for modeling complex systems and network
inference problems are frequently encountered in many fields. Here, I develop
and apply a generative approach to network inference (RCweb) for the case when
the network is sparse and the latent (not observed) variables affect the
observed ones. From all possible factor analysis (FA) decompositions explaining
the variance in the data, RCweb selects the FA decomposition that is consistent
with a sparse underlying network. The sparsity constraint is imposed by a novel
method that significantly outperforms (in terms of accuracy, robustness to
noise, complexity scaling, and computational efficiency) Bayesian methods and
MLE methods using l1 norm relaxation such as K-SVD and l1--based sparse
principle component analysis (PCA). Results from simulated models demonstrate
that RCweb recovers exactly the model structures for sparsity as low (as
non-sparse) as 50% and with ratio of unobserved to observed variables as high
as 2. RCweb is robust to noise, with gradual decrease in the parameter ranges
as the noise level increases.Comment: 8 pages, 5 figure
Cycle-accurate evaluation of reconfigurable photonic networks-on-chip
There is little doubt that the most important limiting factors of the performance of next-generation Chip Multiprocessors (CMPs) will be the power efficiency and the available communication speed between cores. Photonic Networks-on-Chip (NoCs) have been suggested as a viable route to relieve the off- and on-chip interconnection bottleneck. Low-loss integrated optical waveguides can transport very high-speed data signals over longer distances as compared to on-chip electrical signaling. In addition, with the development of silicon microrings, photonic switches can be integrated to route signals in a data-transparent way. Although several photonic NoC proposals exist, their use is often limited to the communication of large data messages due to a relatively long set-up time of the photonic channels. In this work, we evaluate a reconfigurable photonic NoC in which the topology is adapted automatically (on a microsecond scale) to the evolving traffic situation by use of silicon microrings. To evaluate this system's performance, the proposed architecture has been implemented in a detailed full-system cycle-accurate simulator which is capable of generating realistic workloads and traffic patterns. In addition, a model was developed to estimate the power consumption of the full interconnection network which was compared with other photonic and electrical NoC solutions. We find that our proposed network architecture significantly lowers the average memory access latency (35% reduction) while only generating a modest increase in power consumption (20%), compared to a conventional concentrated mesh electrical signaling approach. When comparing our solution to high-speed circuit-switched photonic NoCs, long photonic channel set-up times can be tolerated which makes our approach directly applicable to current shared-memory CMPs
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