Low-temperature amorphous oxide semiconductors for thin-film transistors and memristors: physical insights and applications

While amorphous oxides semiconductors (AOS), namely InGaZnO (IGZO), have found market application in the display industry, their disruptive properties permit to envisage for more advanced concepts such as System-on-Panel (SoP) in which AOS devices could be used for addressing (and readout) of sensors and displays, for communication, and even for memory as oxide memristors are candidates for the next-generation memories. This work concerns the application of AOS for these applications considering the low thermal budgets (< 180 °C) required for flexible, low cost and alternative substrates. For maintaining low driving voltages, a sputtered multicomponent/multi-layered high-κ dielectric (Ta2O5+SiO2) was developed for low temperature IGZO TFTs which permitted high performance without sacrificing reliability and stability. Devices’ performance under temperature was investigated and the bias and temperature dependent mobility was modelled and included in TCAD simulation. Even for IGZO compositions yielding very high thermal activation, circuit topologies for counteracting both this and the bias stress effect were suggested. Channel length scaling of the devices was investigated, showing that operation for radio frequency identification (RFID) can be achieved without significant performance deterioration from short channel effects, which are attenuated by the high-κ dielectric, as is shown in TCAD simulation. The applicability of these devices in SoP is then exemplified by suggesting a large area flexible radiation sensing system with on-chip clock-generation, sensor matrix addressing and signal read-out, performed by the IGZO TFTs. Application for paper electronics was also shown, in which TCAD simulation was used to investigate on the unconventional floating gate structure. AOS memristors are also presented, with two distinct operation modes that could be envisaged for data storage or for synaptic applications. Employing typical TFT methodologies and materials, these are ease to integrate in oxide SoP architectures

Conduction Threshold in Accumulation-Mode InGaZnO Thin Film Transistors

AbstractThe onset of inversion in the metal-oxide-semiconductor field-effect transistor (MOSFET) takes place when the surface potential is approximately twice the bulk potential. In contrast, the conduction threshold in accumulation mode transistors, such as the oxide thin film transistor (TFT), has remained ambiguous in view of the complex density of states distribution in the mobility gap. This paper quantitatively describes the conduction threshold of accumulation-mode InGaZnO TFTs as the transition of the Fermi level from deep to tail states, which can be defined as the juxtaposition of linear and exponential dependencies of the accumulated carrier density on energy. Indeed, this permits direct extraction and visualization of the threshold voltage in terms of the second derivative of the drain current with respect to gate voltage.Authors thank to the EU-FP7 under Project ORAMA CP-IP 246334-2.This is the final version of the article. It first appeared from Nature Publishing Group via http://dx.doi.org/10.1038/srep2256

Indium-Gallium-Zinc Oxide Thin-Film Transistors for Active-Matrix Flat-Panel Displays

Amorphous oxide semiconductors (AOSs) including amorphous InGaZnO (a-IGZO) areexpected to be used as the thin-film semiconducting materials for TFTs in the next-generation ultra-high definition (UHD) active-matrix flat-panel displays (AM-FPDs). a-IGZO TFTs satisfy almost all the requirements for organic light-emitting-diode displays (OLEDs), large and fast liquid crystal displays (LCDs) as well as three-dimensional (3D) displays, which cannot be satisfied using conventional amorphous silicon (a-Si) or polysilicon (poly-Si) TFTs. In particular, a-IGZO TFTs satisfy two significant requirements of the backplane technology: high field-effect mobility and large-area uniformity.In this work, a robust process for fabrication of bottom-gate and top-gate a-IGZO TFTs is presented. An analytical drain current model for a-IGZO TFTs is proposed and its validation is demonstrated through experimental results. The instability mechanisms in a-IGZO TFTs under high current stress is investigated through low-frequency noise measurements. For the first time, the effect of engineered glass surface on the performance and reliability of bottom-gate a-IGZO TFTs is reported. The effect of source and drain metal contacts on electrical properties of a-IGZO TFTs including their effective channel lengths is studied. In particular, a-IGZO TFTs with Molybdenum versus Titanium source and drain electrodes are investigated. Finally, the potential of aluminum substrates for use in flexible display applications is demonstrated by fabrication of high performance a-IGZO TFTs on aluminum substrates and investigation of their stability under high current electrical stress as well as tensile and compressive strain

TFT Small Signal Model and Analysis

We present an accurate small signal model for thin film transistors (TFTs) taking into account non-idealities such as contact resistance, parasitic capacitance, and threshold voltage shift. The model gives high accuracy in s-parameters, and the predicted cutoff frequency yields 1% discrepancy compared with measurement results. In contrast, the conventional CMOS small signal model adapted for TFTs yields 12.5% error. The TFT’s cutoff frequency is also evaluated under bias stress to examine the effect of device instability on small signal behavior.This is the author accepted manuscript. The final version is available from IEEE via http://dx.doi.org/10.1109/LED.2016.257592

Yttrium and Scandium in Solution-processed Oxide Electronic Materials.

Large area electronics are critical for many novel applications such as smart windows, wearable electronics and Internet of Things. Among candidate materials, metal oxides have relatively good performance and stability and can be deposited by low-cost solution processes. This thesis explores the roles of rare-earth elements yttrium and scandium in solution-processed metal oxide thin films including semiconducting scandium- or yttrium-doped ZTO, conducting scandium- or yttrium-doped zinc oxide, and insulating yttrium-scandium oxide. Yttrium and scandium can act as oxygen getters and stabilizers, and the use of higher-order alloys can improve film thermal stability and electrical performance. First, thin film transistors (TFTs) are used to characterize undoped ZTO films as a baseline. The device performance of solution-processed ZTO TFTs depends on ink Zn to Sn ratio and annealing temperature, optimized to be 7:3 and 480⁰C, respectively. The optimized ZTO has a shallow donor energy level of 7meV and a steep exponential subgap band tail with a percolation energy of 3meV. Sputtered Mo forms an excellent ohmic contact to solution-processed ZTO with a width-normalized contact resistance of 8.7Ω•cm and a transfer length of 0.34μm, making the technology suitable for future sub-micron channel length devices. Yttrium enhances performance of ZTO TFTs at low concentrations (3at%). High yttrium concentrations slightly improve TFT negative bias illumination stress stability by reducing oxygen vacancy-related defects. Second, the introduction of scandium or yttrium in solution-processed ZnO decreases the conductivity by three orders of magnitude, which is ascribed to formation of insulating structures along grain boundaries. Scandium or yttrium also make the resistivity of ZnO more thickness-dependent than undoped ZnO after forming gas anneal, by causing surface depletion and grain disruptions in the film. Third, solution-processed (YxSc1-x)2O3 insulating alloys have comparable dielectric performance to vacuum deposited (YxSc1-x)2O3, with high breakdown field > 4MV/cm, low leakage current and low dielectric frequency dispersion. Even after 900°C anneals induce crystallization, the alloys maintain a high breakdown field. The yttrium- and scandium- doped solution-processed oxides developed here form a complete suite of electronic materials suitable for fabrication of future large-area electronic devices.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/133324/1/wbhu_1.pd

Advances in Amorphous Oxide Semiconductor Devices, Materials, and Processes for Customizable Scalable Manufacturing of Thin-Film Electronics

Electronic circuits comprised of thin-film transistors (TFTs) are essential to nearly every modern display technology. For decades, the TFT industry relied on amorphous silicon, but increasing performance demands required semiconductors with superior electron transport leading to the adoption of amorphous oxide semiconductors (AOS). The superior electron transport and ease of thin-film preparation of AOS has led to a growing interest in developing thin-film electronics for beyond-display technologies. These include monolithic 3D integration on Si complementary metal-oxide-semiconductor integrated circuits (ICs) – to continue Moore’s law, add new functionality, and improve performance – and flexible electronics for electronic skins, textiles, solar cells, and displays. In this thesis we facilitate the adoption of thin-film electronics for beyond-display technologies by: 1) developing uniform and conformal AOS deposition processes with record performance; 2) demonstrating expanded AOS capabilities by exploring new device architectures; and 3) developing a new additive manufacturing technique for customizable scalable manufacturing. First, we meet the performance and thermal budget requirements of AOS for beyond-display applications by using atomic-layer deposition (ALD) – a conformal, uniform, and precise vapor-phase deposition technique – and aggressively optimizing the process conditions. We discovered that improved electrical performance correlated with an increase in film density, which can be achieved by increasing deposition temperature, by post-deposition annealing, and by using plasma enhanced-ALD (PE-ALD). Second, we made innovations in device design to expand the range of circuit applications for AOS TFTs by exploiting the benefit of their wide-bandgap to fabricate high-voltage TFTs (HVTFTs). While the current handling capabilities of these HVTFTs cannot compete with conventional power electronics, the ability to deposit AOS materials directly on Si ICs may enable monolithic 3D integration of HVTFTs, adding new functionality as an HV interface to aggressively scaled low-voltage Si CMOS. Third, we show that ambient instabilities are caused by interactions between the surface of the AOS film and ambient molecules. We eliminate these instabilities by developing an ALD-based passivation layer. Fourth, we study the temporal and bias stress stability of our ALD AOS thin-film transistors and see excellent stability after the first month of aging and improved positive bias stress stability with passivation. Fifth, we investigate several materials to form a Schottky contact to ALD AOS films to enable future rectifier-based circuits and unipolar logic circuits. Finally, we develop an additive manufacturing approach for customizable manufacturing of AOS devices. Further improvement in device performance and reduction of channel length, enabled by the sub-µm precision of EHD, has the potential to yield fully customizable additive manufacturing of high-frequency circuits.PHDElectrical and Computer EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/169721/1/allemang_1.pd

ZTO Thin film transistor parameter extraction and modeling

Transistor models are of utmost importance for device behaviour prediction and circuit design. Physical modelling has the advantage of the parameters being correlated based on device physics. This allows to gain insight on the device during the analysis and extraction of parameters phase. However, the extraction methods may not consider possible non-idealities of the device, which can cause modelling issues when working with novel thin film transistors (TFTs). A simple physical DC and AC model was applied to a novel zinc tin oxide TFT annealed at low temperatures (200 ºC). The characteristic curves of four devices with different dimensions were measured and analysed, and the model parameters were extracted. The characterization and optimization of the models were implemented through the analysis of the fitting with the measured data. Two DC models were developed, the main difference being the contact resistance extraction - using the classic transmission-line method or a procedure based on MOSFETs with non-ideal behaviour that considers the possible bias dependency of the parameter. The latter method allowed to simulate the device characteristic curves more effectively. The AC model did not fit for frequencies above the cut-off and differed slightly for lower frequencies due to the simplicity of the model applied