8,974 research outputs found

    Fabrication of Surface Micromachined AlN Piezoelectric Microstructures and its Potential Apllication to RF Resonators

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    We report on a novel microfabrication method to fabricate aluminum nitride (AlN) piezoelectric microstructures down to 2 microns size by a surface micromachining process. Highly c-axis oriented AlN thin films are deposited between thin Cr electrodes on polysilicon structural layers by rf reactive sputtering. The top Cr layer is used both as a mask to etch the AlN thin films and as an electrode to actuate the AlN piezoelectric layer. The AlN layer is patterned anisotropically by wet etching using a TMAH (25%) solution. This multilayer stack uses silicon-di-oxide as a sacrificial layer to make free-standing structures. One-port scattering paramenter measurement using a network analyzer show a resonant frequency of 1.781 GHz on a clamped-clamped beam suspended structure. The effective electromechanical coupling factor is calculated as 2.4 % and the measured bandwidth is 13.5 MHz for one such a doubly clamped beam (990x30) ÎŒm2

    A Novel On-chip Three-dimensional Micromachined Calorimeter with Fully Enclosed and Suspended Thin-film Chamber for Thermal Characterization of Liquid Samples

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    A microfabricated calorimeter (Ό-calorimeter) with an enclosed reaction chamber is presented. The 3D micromachined reaction chamber is capable of analyzing liquid samples with volume of 200 nl. The thin film low-stress silicon nitride membrane is used to reduce thermal mass of the calorimeter and increase the sensitivity of system. The Ό-calorimeter has been designed to perform DC and AC calorimetry, thermal wave analysis, and differential scanning calorimetry. The Ό-calorimeter fabricated with an integrated heater and a temperature sensor on opposite sides of the reaction chamber allows to perform thermal diffusivity and specific heat measurements on liquid samples with same device. Measurement results for diffusivity and heat capacitance using time delay method and thermal wave analysis are presented

    Micromachining of buried micro channels in silicon

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    A new method for the fabrication of micro structures for fluidic applications, such as channels, cavities, and connector holes in the bulk of silicon wafers, called buried channel technology (BCT), is presented in this paper. The micro structures are constructed by trench etching, coating of the sidewalls of the trench, removal of the coating at the bottom of the trench, and etching into the bulk of the silicon substrate. The structures can be sealed by deposition of a suitable layer that closes the trench. BCT is a process that can be used to fabricate complete micro channels in a single wafer with only one lithographic mask and processing on one side of the wafer, without the need for assembly and bonding. The process leaves a substrate surface with little topography, which easily allows further processing, such as the integration of electronic circuits or solid-state sensors. The essential features of the technology, as well as design rules and feasible process schemes, will be demonstrated on examples from the field of Âż-fluidic

    Process Optimization and Downscaling of a Single Electron Single Dot Memory

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    This paper presents the process optimization of a single-electron nanoflash electron memory. Self-aligned single dot memory structures have been fabricated using a wet anisotropic oxidation of a silicon nanowire. One of the main issue was to clarify the process conditions for the dot formation. Based on the process modeling, the influence of various parameters (oxidation temperature, nanowire shape) has been investigated. The necessity of a sharp compromise between these different parameters to ensure the presence of the memory dot has been established. In order to propose an aggressive memory cell, the downscaling of the device has been carefully studied. Scaling rules show that the size of the original device could be reduced by a factor of 2. This point has been previously confirmed by the realization of single-electron memory devices

    3D-Nanomachining using corner lithography

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    We present a fabrication method to create 3D nano structures without the need for nano lithography. The method, named "corner lithography" is based on conformal deposition and subsequent isotropic thinning of a thin film. The material that remains in sharp concave corners is either used as a mask or directly as structural material. The method is demonstrated for nano scale modifications of pyramidal tips, as well as the creation of suspended nanowires

    Etching of silicon in alkaline solutions: a critical look at the {111} minimum

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    Anisotropic wet-chemical etching of silicon in alkaline solutions is a key technology in the fabrication of sensors and actuators. In this technology, etching through masks is used for fast and reproducible shaping of micromechanical structures. The etch rates Image depend mainly on composition and temperature of the etchant. In a plot of etch rate versus orientation, there is always a deep, cusped minimum for the {1 1 1} orientations. We have investigated the height of the {1 1 1} etch-rate minimum, as well as the etching mechanisms that determine it. We found that in situations where masks are involved, the height of the {1 1 1} minimum can be influenced by nucleation at a silicon/mask-junction. A junction which influences etch or growth rates in this way can be recognized as a velocity source, a mathematical concept developed by us that is also applicable to dislocations and grain boundaries. The activity of a velocity source depends on the angle between the relevant {1 1 1} plane and the mask, and can thus have different values at opposite {1 1 1} sides of a thin wall etched in a micromechanical structure. This observation explains the little understood spread in published data on etch rate of {1 1 1} and the anisotropy factor (often defined as Imag
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