Glass multilayer bonding for high density interconnect substrates

The aim of this research was the investigation of bonding borosilicate glass sheets, its trade mark CMZ, 100μm thickness, to create multilayer substrates capable of supporting high-density electrical interconnections. CMZ glass was chosen as it has a coefficient of thermal expansion that is close to that of silicon, thereby minimising thermal stresses in assemblies generated by manufacturing processes or service conditions. Two different methods of bonding the glass were used in this study; pressure assisted low temperature bonding (PALTB), and water glass bonding, using Sodium Trisilicate (Na2Si3O7) solution. These two bonding methods have already been applied in electronics manufacturing applications, such as silicon wafer bonding and multichip modules (MCMs). However, glass-to-glass bonding is a relatively new subject and this study is an attempt to standardise bonding processes. Additionally, the concept of using glass as a multilayer substrate provides a foundation for further exploration by other investigators. Initial tests that were carried out before standardising the procedures for these two methods showed that a two-stage bonding process provided optimum results. A preliminary stage commenced by placing the cleaned (using Decon 90 solution) samples in a vacuum oven for 15 minutes, then heating at 100oC for 1hr. The permanent stage was then achieved by heating the samples in a conventional oven at temperatures from 200 to 400oC, for different periods. At this stage, the main difference between the two methods was the application of pressure (1-2MPa) during heating of the PALTB samples. To evaluate the quality of the bonds, qualitative tests such as visual, optical microscope and dye penetrant were used. In addition, to estimate the strength and the rigidity of the interlayer bonds, two quantitative tests, comprising of deflection under cyclic stresses and crack opening were used. Thermal cycling and humidity tests were also used to assess resistance of the bonds to environmental effects. The results showed that heating to 100oC was insufficient to enhance the bonds, as occasionally a sudden increase of deflection was observed indicating slippage/delamination. These bonds were enhanced during the permanent bonding stage by heating to 300oC in PALTB, under a pressure of 1-2MPa. The crack-opening test showed that the delamination distances of the bonds in the permanent stage were lower than that for preliminary bonding in both bonding methods. The delamination distances from the crack opening tests were used to calculate the strain energy release rate (GIC) and fracture toughness (KIC) values of the interlayers. The results showed that the KIC values of the permanent PALTB and water glass interlayers were higher than 1MPa.m0.5, while the KIC value of the CMZ glass, determined by linear elastic fracture mechanics, was around 0.8MPa.m0.5. The optical observations revealed that the prepared bonded sheets did not delaminate or break after thermal cycling and humidity tests

Molecular level interactions of large area 2D materials

textTwo-dimensional materials such as self-assembled monolayers (SAMs), graphene, etc. are candidate materials for improving the performance of microelectronics components and MEMS/NEMS devices. In view of their relatively large in-plane dimensions, surface forces are likely to dominate their behavior. The purpose of the current work was to extract not only the adhesion energy (or steady state fracture toughness) but also the traction-separation relation associated with interactions between various two-dimensional materials and substrates. In particular, interactions between SAMs terminated by carboxyl and diamine (COOH/NMe2) groups, hydroxylated silicon surfaces, graphene and silicon, graphene and its seed copper and graphene and epoxy over large areas was considered. Traction-separation relations, which are a continuum description of such molecular interactions, were determined by a direct method, which makes use of measurements of crack tip opening displacements; an inverse approach where the key parameters are extracted by comparing measured global parameters with finite element solutions and a hybrid approach in which the direct method was supplemented by finite element analysis. Furthermore, the surface free energy of graphene was measured by contact angle measurements. The most striking observation across all the interactions that were considered is that the interaction ranges were much larger than those attributed to van der Waals forces. While van der Waals models might have been at play between graphene and its seed copper foil and graphene and epoxy, the adhesion energies were surprisingly high. This coupled with the long interaction range suggests that roughness effects modulated the basic force field. Interactions between graphene and silicon and hydroxylated silicon surfaces may have been due to capillary and/or electrostatic again possibly modulated by roughness. The interactions between COOH and NMe2 SAMs became stronger under vacuum, which may have induced chemical bonding, and tougher under mixed-mode loading.Engineering Mechanic

Surface activation for low temperature wafer fusion bonding by radicals produced in an oxygen discharge

A new method of exposing silicon/semiconductor wafers to a mixture of radicals is described, in which these species are generated in an oxygen-rich gas discharge confined between a concentric pair of annular mesh electrodes surrounding the wafers. This approach allows the wafer surfaces to be treated without damage from the energetic ions, strong electric fields, and high UV fluxes associated with direct treatment by exposure to gas discharge plasmas. The process is compared with direct oxygen plasma activation for its latitude with respect to treatment duration, effect on wafer surface roughness and bond strength. Wider process latitude and reduced surface roughening are obtained for treatment by radicals compared with direct plasma exposure. Comparative analysis of treated and untreated silicon surfaces by X-ray photoelectron spectroscopy indicate that traces of fluorine present on the wafer surface before treatment are removed with great efficiency by the process

An evaluation of critical issues for microhydraulic transducers : silicon wafer bonding, strength of silicon on insulator membranes and gold-tin solder bonding

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering, 2001.Includes bibliographical references (p. 121-127).Microhydraulics transducers (MHT) are a class of microelectromechanical systems (MEMS) currently being developed to produce bi-directional transducers with high power densities (500-1000 W/kg). The development of these devices, which combine microfabrication technology and piezoelectric materials, requires the use of variety of materials and fabrication technologies that are not fully developed. Three materials and structures issues, which are essential to the development of MHT devices, are silicon wafer bonding, strength of silicon-on- insulator (SOI) membranes, and gold-tin bonding. Each of these topics was addressed independently. The mechanical integrity of silicon fusion bonds as a function of processing parameters was examined using a four-point bend delamination specimen. The study showed that the specimen was effective for characterizing low toughness bonds and that certain processing conditions can have a profound impact on bond toughness. Bond toughness increased with anneal time and temperature, but, initial contacting conditions, such as time and clamping pressure, proved to have little effect on final bond toughness. The fracture strength of membranes fabricated from SOI wafers using deep reactive ion etching was experimentally measured. Results showed that the strengths of these membranes was less than that of structures etched from bulk silicon and that the strength was dependent on SOI manufacturer. Finally, a thin film gold-tin solder bond was developed to bond bulk piezoelectric material to silicon structures. The process, which uses a sputtered gold-tin eutectic alloy (80wt%Au-20wt%Sn), was refined to produce void-free bonds. Preliminary tensile tests indicated failure was likely to occur in the piezoelectric material itself or along the solder-piezoelectric material interface. The results of these three studies provide information that is essential to the development of MHT devices as well as a wide range of MEMS devices.by Kevin Thomas Turner.S.M

Plasma-activated fusion bonding for vacuum encapsulation of microdevices

A fabrication process for vacuum-encapsulating PZT microcantilevers was designed in this dissertation. Initially, a low temperature wafer-bonding recipe was optimized with the help of plasma-activation. Conventional direct fusion bonding temperature was reduced from 400°C to 85°C, and final thermal annealing temperature and time of 1000°C for 4 hours (hr) were significantly reduced to 300°C and 1 hr respectively. Tensile tests conducted on dies diced from the bonded wafer stack revealed bond strengths of 22.15 MPa, which was close to the bulk fracture strength of 24 MPa for silicon. Near infrared images of the wafer stack showed no debonded regions at the interface. Surface and interface chemistry of oxygen plasma-activated wafers before, during, and after bonding were investigated. Significance of wet chemical activation technique, like RCA (Radio Corporation of America) cleaning, was studied. The time interval between plasma-activation and fusion bonding was varied, and its effect on the bond quality and bond strength was investigated. Decrease in the bond-quality and strength was observed with an increase in storage time. However, an unexpected increase in the bond quality was observed after 48 hr, and was attributed to the increase in the interfacial oxide layer. Further investigations revealed that the interfacial oxide layer was capable of absorbing gas molecules released as a byproduct of ongoing reactions at the interface of the two wafers. Gettering capability of the interfacial oxide layer was confirmed through the bonding of plasma-activated and 48 hr stored silicon (Si) and silicon dioxide (SiO2) wafers. Infrared images showed a good bond for the wafer stack. Since designing a fabrication process flow for vacuum-encapsulation of microdevices was the primary objective, lead zirconate titanate microcantilevers were fabricated onto a silicon substrate. The microdevices were actuated in ambient air pressure as well as in a vacuum environment. Broadening of the resonance curve was observed with an increase in the magnitude of ambient pressure, and is a result of increased air-damping. Experimental results obtained were compared to theoretical results from finite element modeling analyses. Vacuum cavities were fabricated between two Si wafers. Optical lid-deflection method of measuring internal cavity pressure was explored and employed with the help of high aspect ratio pressure diaphragms on a capping wafer. An investigation of seal integrity of the vacuum package revealed real/virtual leaks. The gettering capability of the SiO2 layer was employed in order to preserve the vacuum-level in the cavities. Two types of gettering patterns were investigated. It was concluded that an SiO2 getter layer at the interface increased the seal-integrity of the vacuum packages, while getter rings still showed signs of real leaks. In addition, it was observed that the internal vacuum-level was higher for cavities with getter rings as compared to cavities without getters. It was concluded that getter rings were capable of preventing virtual leaks but not real leaks. A thick interfacial getter layer, however, prevented both the real and virtual leaks. Finally, a vacuum-packaging fabrication method to encapsulate lead zirconate titanate microcantilevers was proposed. In addition, more accurate methods of measuring package vacuum pressure magnitudes were proposed

Wafer bonding of processed Si CMOS VLSI and GaAs for mixed technology integration

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, Februaru 2002.Includes bibliographical references (p. 91-94).The successful bonding of bare thinned Si SOI wafers to bare GaAs wafers in previous research has proven to be an important first step in achieving integration of Si electronics with GaAs optoelectronic devices. The thinning of the SOI wafer has been shown to be a successful solution to the problem of the thermal expansion coefficient mismatch between Si and GaAs, allowing for the potential dense integration of mixed optoelectronic and electronic technologies. This research takes the next logical step toward that end by bonding Si wafers with simulated full back-end processing to GaAs wafers. The back-end processing simulation consists of depositing 1000[Angstroms] of Al, patterning the Al into 5[mu]m serpentine lines on a 5[mu]m pitch, covering the Al with a PECVD oxide, and performing CMP planarization of the oxide. The 1000[Angstroms] variations caused by the Al layer are consistent with surface profiles taken from fully processed SOI wafers obtained from IBM. The result is that these "simulation" wafers model the difficulties presented with bonding fully processed wafers; namely the temperature constraints caused by the existence of buried Al metal and the topography created by the patterned metal. The entire process, including the bonding and post-bond anneal, is carried out at temperatures below 45° C, making it compatible with a fully processed SOI CMOS wafer. The use of dielectric CMP has become a common back-end processing step. The wafer bonding in this work relies on CMP technology to planarize PECVD oxide deposited on the bonding surface of both wafers. The combination of CMP with post CMP cleaning methods results in a PECVD oxide surface with an order of magnitude reduction in the r.m.s. roughness, rendering the surface smooth enough to facilitate wafer bonding. The future goal of this project is to bond fully processed Si CMOS wafers to GaAs wafers containing optoelectronic devices and to test the feasibility of creating interconnects through the bond interface.by Edward Robert Barkley.S.M

Gold Thermocompression Wafer Bonding

Thermocompression bonding of gold is a promising technique for the fabrication and packaging microelectronic and MEMS devices. The use of a gold interlayer and moderate temperatures and pressures results in a hermetic, electrically conductive bond. This paper documents work conducted to model the effect of patterning in causing pressure non-uniformities across the wafer and its effect on the subsequent fracture response. A finite element model was created that revealed pattern-dependent local pressure variations of more than a factor of three. This variation is consistent with experimental observations of bond quality across individual wafers A cohesive zone model was used to investigate the resulting effect of non-uniform bond quality on the fracture behavior. A good, qualitative agreement was obtained with experimental observations of the load-displacement response of bonds in fracture tests.Singapore-MIT Alliance (SMA

Silicon carbide process development for microengine applications : residual stress control and microfabrication

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2004.Includes bibliographical references.The high power densities expected for the MIT microengine (silicon MEMS-based micro-gas turbine generator) require the turbine and compressor spool to rotate at a very high speed at elevated temperatures (1300 to 1700 K). However, the thermal softening of silicon (Si) at temperatures above 900 K limits the highest achievable operating temperatures, which in turn significantly compromises the engine efficiency. Silicon carbide (SiC) offers great potential for improved microengine efficiency due to its high stiffness, strength, and resistance to oxidation at elevated temperatures. However, techniques for microfabricating SiC to the high level of precision needed for the microengine are not currently available. Given the limitations imposed by the SiC microfabrication difficulties, this thesis proposed Si-SiC hybrid turbine structures, explores key process steps, identified, and resolved critical problems in each of the processes along with a thorough characterization of the microstructures, mechanical properties, and composition of CVD SiC. Three key process steps for the Si-SiC hybrid structures are CVD SiC deposition on silicon wafers, wafer-level SiC planarization, and Si-to-SiC wafer bonding. Residual stress control in SiC coatings is of the most critical importance to the CVD process itself as well as to the subsequent wafer planarization, and bonding processes since residual stress-induced wafer bow increases the likelihood of wafer cracking significantly. Based on CVD parametric studies performed to determine the relationship between residual stresses in SiC and H2/MTS ratio, deposition temperature, and HCl/MTS ratio, very low residual stress (less than several tens of MPa) in thick CVD SiC coatings (up to -50 pm) was achieved.(cont.) In the course of the residual stress study, a general method for stress quantification was developed to isolate the intrinsic stress from the thermal stress. In addition, qualitative explanations for the residual stress generation are also offered, which are in good agreement with experimental results. In the post-CVD processes, the feasibility of SiC wafer planarization and Si-to-SiC wafer bonding processes have successfully been demonstrated, where CVD oxide was used as an interlayer bonding material to overcome the roughness of SiC surface. Finally, the bonding interface of the Si-SiC hybrid structures with oxide interlayer was verified to retain its integrity at high temperatures through four-point flexural tests.by Dongwon Choi.Ph.D