A quick termination detection protocol by reducing overload for mobile ad hoc networks

An ad hoc network is characterized by the fact that there is no fixed topology due to the mobility of nodes, interference, multipath propagation and path loss. Execution of applications in such kind of networks typically consists of a number of successive phases such as network reprogramming, localization, power monitoring, and parameter updates. Termination detection of a phase is therefore a critical operation to safely execute a new phase on some or all of the network nodes. In resource constrained network environment the overhead should be minimum in order to increase throughput and minimize delay. This paper studies the existing solutions for termination detection by analyzing their effectiveness. Moreover, in this paper, we propose an efficient algorithmic solution to encounter termination detection by minimizing the network overloads

A Survey and analysis of algorithms for the detection of termination in a distributed system

This paper looks at algorithms for the detection of termination in a distributed system and analyzes them for effectiveness and efficiency. A survey is done of the published algorithms for distributed termination and each is evaluated. Both centralized distributed systems and fully distributed systems are reviewed. The algorithms are analyzed for the overhead and conclusions are made about the situations in which they can be used, i.e. an operating system, a real-time system, or a user application. An original algorithm is presented for the asynchronous case with first-in-first-out message ordering. It allows any process to initiate detection of termination and makes use of multiple tokens

Systematic composition of distributed objects: Processes and sessions

We consider a system with the infrastructure for the creation and interconnection of large numbers of distributed persistent objects. This system is exemplified by the Internet: potentially, every appliance and document on the Internet has both persistent state and the ability to interact with large numbers of other appliances and documents on the Internet. This paper elucidates the characteristics of such a system, and proposes the compositional requirements of its corresponding infrastructure. We explore the problems of specifying, composing, reasoning about and implementing applications in such a system. A specific concern of our research is developing the infrastructure to support structuring distributed applications by using sequential, choice and parallel composition, in the anarchic environment where application compositions may be unforeseeable and interactions may be unknown prior to actually occurring. The structuring concepts discussed are relevant to a wide range of distributed applications; our implementation is illustrated with collaborative Java processes interacting over the Internet, but the methodology provided can be applied independent of specific platforms

A Distributed Implementation Method for Parallel Programming

A method is described for implementing on a finite network of processing "cells", called the "implementation graph", programs whose potential parallelism is not fixed by the implementation but varies according to the input parameters. First, programming constructs are described permitting a computation, regarded as a dynamic structure called the "computation graph", to diffuse through the implementation graph. Second, the implementation problem of mapping an unbounded number of computation nodes on a finite number of cells is tackled. Processor allocation and message buffering completely disappear from the programmer's concerns. The mechanism proposed is considered a generalization of the stack mechanism

The impact of asynchrony on computer architecture

The performance characteristics of asynchronous circuits are quite different from those of their synchronous counterparts. As a result, the best asynchronous design of a particular system does not necessarily correspond to the best synchronous design, even at the algorithmic level. The goal of this thesis is to examine certain aspects of computer architecture and design in the context of an asynchronous VLSI implementation. We present necessary and sufficient conditions under which the degree of pipelining of a component can be modified without affecting the correctness of an asynchronous computation. As an instance of the improvements possible using an asynchronous architecture, we present circuits to solve the prefix problem with average-case behavior better than that possible by any synchronous solution in the case when the prefix operator has a right zero. We show that our circuit implementations are area-optimal given their performance characteristics, and have the best possible average-case latency. At the level of processor design, we present a mechanism for the implementation of precise exceptions in asynchronous processors. The novel feature of this mechanism is that it permits the presence of a data-dependent number of instructions in the execution pipeline of the processor. Finally, at the level of processor architecture, we present the architecture of a processor with an independent instruction stream for branches. The instruction set permits loops and function calls to be executed with minimal control-flow overhead