Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition

A neuromorphic chip that combines CMOS analog spiking neurons and memristive synapses offers a promising solution to brain-inspired computing, as it can provide massive neural network parallelism and density. Previous hybrid analog CMOS-memristor approaches required extensive CMOS circuitry for training, and thus eliminated most of the density advantages gained by the adoption of memristor synapses. Further, they used different waveforms for pre and post-synaptic spikes that added undesirable circuit overhead. Here we describe a hardware architecture that can feature a large number of memristor synapses to learn real-world patterns. We present a versatile CMOS neuron that combines integrate-and-fire behavior, drives passive memristors and implements competitive learning in a compact circuit module, and enables in-situ plasticity in the memristor synapses. We demonstrate handwritten-digits recognition using the proposed architecture using transistor-level circuit simulations. As the described neuromorphic architecture is homogeneous, it realizes a fundamental building block for large-scale energy-efficient brain-inspired silicon chips that could lead to next-generation cognitive computing.Comment: This is a preprint of an article accepted for publication in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol 5, no. 2, June 201

Asynchronous techniques for system-on-chip design

SoC design will require asynchronous techniques as the large parameter variations across the chip will make it impossible to control delays in clock networks and other global signals efficiently. Initially, SoCs will be globally asynchronous and locally synchronous (GALS). But the complexity of the numerous asynchronous/synchronous interfaces required in a GALS will eventually lead to entirely asynchronous solutions. This paper introduces the main design principles, methods, and building blocks for asynchronous VLSI systems, with an emphasis on communication and synchronization. Asynchronous circuits with the only delay assumption of isochronic forks are called quasi-delay-insensitive (QDI). QDI is used in the paper as the basis for asynchronous logic. The paper discusses asynchronous handshake protocols for communication and the notion of validity/neutrality tests, and completion tree. Basic building blocks for sequencing, storage, function evaluation, and buses are described, and two alternative methods for the implementation of an arbitrary computation are explained. Issues of arbitration, and synchronization play an important role in complex distributed systems and especially in GALS. The two main asynchronous/synchronous interfaces needed in GALS-one based on synchronizer, the other on stoppable clock-are described and analyzed

Development of an Oxygen Saturation Monitoring System by Embedded Electronics

Measuring Oxygenation of blood (SaO2) plays a vital role in patient’s health monitoring. This is often measured by pulse oximeter, which is standard measure during anesthesia, asthma, operative and post-operative recoveries. Despite all, monitoring Oxygen level is necessary for infants with respiratory problems, old people, and pregnant women and in other critical situations. This paper discusses the process of calculating the level of oxygen in blood and heart-rate detection using a non-invasive photo plethysmography also called as pulsoximeter using the MSP430FG437 microcontroller (MCU). The probe uses infrared lights to measure and should be in physical contact with any peripheral points in our body. The percentage of oxygen in the body is worked by measuring the intensity from each frequency of light after it transmits through the body and then calculating the ratio between these two intensities

Applications of computer communications in education.

Applications of computer communications can be used in many ways in education. An overview is given of a number of categories of computer communications applications in learning-related activities. Particular attention is given to a new type of system called a course-support environment. In this type of system a database is integrated with Web-based tools and applications, and used to generate a course-support environment accessed via a standard Web browser. Some examples are given. The article moves on to an overview of various issues confronting the acceptance of computer communication systems in educational settings, and indicates some of the ways in which computer communications engineers will have to deal with those issue

Pipeline-Based Power Reduction in FPGA Applications

This paper shows how temporal parallelism has an important role in the power dissipation reduction in the FPGA field. Glitches propagation is blocked by the flip-flops or registers in the pipeline. Several multiplication structures are implemented over modern FPGAs, StratixII and Virtex4, comparing their results with and without pipeline and hardware duplication

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI

This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC DC-DC) converters and adaptive clocking that generates four on-chip voltages between 0.45 and 1 V using only 1.0 V core and 1.8 V IO voltage inputs. The converters achieve high efficiency at the system level by switching simultaneously to avoid charge-sharing losses and by using an adaptive clock to maximize performance for the resulting voltage ripple. Details about the implementation of the DC-DC switches, DC-DC controller, and adaptive clock are provided, and the sources of conversion loss are analyzed based on measured results. This system pushes the capabilities of dynamic voltage scaling by enabling fast transitions (20 ns), simple packaging (no off-chip passives), low area overhead (16%), high conversion efficiency (80%-86%), and high energy efficiency (26.2 DP GFLOPS/W) for mobile devices

Teaching and learning Operational Amplifiers using a reconfigurable and expandable kit

Operational Amplifiers (OpAmps) are one of the most important integrated circuits in the area of electronics. These type of devices are widely adopted in the area since they allow the design of simple and/or complex analogue circuits without many efforts. It is therefore fundamental to create innovative educational solutions to facilitate their teaching and learning, and in particular the inclusion of more experimental work in a course curricula. For this purpose, it was designed and implemented a reconfigurable and expandable kit to teach and learn electronic circuits based on the OpAmp uA741. The kit comprises a software application and a hardware platform. The software application allows the simulation and the reconfiguration of real electronic circuits based on the OpAmp uA741 included in the hardware platform. For measuring and/or applying signals to a particular reconfigured circuit, users may establish automatic connections. In this paper it is described the features and functionalities provided by the kit, and an overview about the OpAmp uA741. At the end, some teachers’ opinions about their perceptions concerning a possible adoption of the kit in a real educational scenario are presented.N/

A differential memristive synapse circuit for on-line learning in neuromorphic computing systems

Spike-based learning with memristive devices in neuromorphic computing architectures typically uses learning circuits that require overlapping pulses from pre- and post-synaptic nodes. This imposes severe constraints on the length of the pulses transmitted in the network, and on the network's throughput. Furthermore, most of these circuits do not decouple the currents flowing through memristive devices from the one stimulating the target neuron. This can be a problem when using devices with high conductance values, because of the resulting large currents. In this paper we propose a novel circuit that decouples the current produced by the memristive device from the one used to stimulate the post-synaptic neuron, by using a novel differential scheme based on the Gilbert normalizer circuit. We show how this circuit is useful for reducing the effect of variability in the memristive devices, and how it is ideally suited for spike-based learning mechanisms that do not require overlapping pre- and post-synaptic pulses. We demonstrate the features of the proposed synapse circuit with SPICE simulations, and validate its learning properties with high-level behavioral network simulations which use a stochastic gradient descent learning rule in two classification tasks.Comment: 18 Pages main text, 9 pages of supplementary text, 19 figures. Patente