Unoriented 3d TFTs

This paper generalizes two facts about oriented 3d TFTs to the unoriented case. On one hand, it is known that oriented 3d TFTs having a topological boundary condition admit a state-sum construction known as the Turaev-Viro construction. This is related to the string-net construction of fermionic phases of matter. We show how Turaev-Viro construction can be generalized to unoriented 3d TFTs. On the other hand, it is known that the "fermionic" versions of oriented TFTs, known as Spin-TFTs, can be constructed in terms of "shadow" TFTs which are ordinary oriented TFTs with an anomalous $\mathbb{Z}_2$ 1-form symmetry. We generalize this correspondence to Pin$^+$-TFTs by showing that they can be constructed in terms of ordinary unoriented TFTs with anomalous $\mathbb{Z}_2$ 1-form symmetry having a mixed anomaly with time-reversal symmetry. The corresponding Pin$^+$-TFT does not have any anomaly for time-reversal symmetry however and hence it can be unambiguously defined on a non-orientable manifold. In case a Pin$^+$-TFT admits a topological boundary condition, one can combine the above two statements to obtain a Turaev-Viro-like construction of Pin$^+$-TFTs. As an application of these ideas, we construct a large class of Pin$^+$-SPT phases.Comment: 41 pages, 31 figures, v2: additional references, v3: minor revisio

Enhanced bias stress stability of a-InGaZnO thin film transistors by inserting an ultra-thin interfacial InGaZnO:N layer

Amorphous indium-gallium-zinc oxide (a-IGZO) thin film transistors (TFTs) having an ultra-thin nitrogenated a-IGZO (a-IGZO:N) layer sandwiched at the channel/gate dielectric interface are fabricated. It is found that the device shows enhanced bias stress stability with significantly reduced threshold voltage drift under positive gate bias stress. Based on x-ray photoelectron spectroscopy measurement, the concentration of oxygen vacancies within the a-IGZO:N layer is suppressed due to the formation of N-Ga bonds. Meanwhile, low frequency noise analysis indicates that the average trap density near the channel/dielectric interface continuously drops as the nitrogen content within the a-IGZO:N layer increases. The improved interface quality upon nitrogen doping agrees with the enhanced bias stress stability of the a-IGZO TFTs.This work was supported in part by the State Key Program for Basic Research of China under Grant Nos. 2010CB327504, 2011CB922100, and 2011CB301900; in part by the National Natural Science Foundation of China under Grant Nos. 60936004 and 11104130; in part by the Natural Science Foundation of Jiangsu Province under Grant Nos. BK2011556 and BK2011050; and in part by the Priority Academic Program Development of Jiangsu Higher Education Institutions

Contact resistance and overlapping capacitance in flexible sub-micron long oxide thin-film transistors for above 100 MHz operation

In recent years new forms of electronic devices such as electronic papers, flexible displays, epidermal sensors, and smart textiles have become reality. Thin-film transistors (TFTs) are the basic blocks of the circuits used in such devices and need to operate above 100 MHz to efficiently treat signals in RF systems and address pixels in high resolution displays. Beyond the choice of the semiconductor, i.e., silicon, graphene, organics, or amorphous oxides, the junctionless nature of TFTs and its geometry imply some limitations which become evident and important in devices with scaled channel length. Furthermore, the mechanical instability of flexible substrates limits the feature size of flexible TFTs. Contact resistance and overlapping capacitance are two parasitic effects which limit the transit frequency of transistors. They are often considered independent, while a deeper analysis of TFTs geometry imposes to handle them together; in fact, they both depend on the overlapping length (LOV) between source/drain and the gate contacts. Here, we conduct a quantitative analysis based on a large number of flexible ultra-scaled IGZO TFTs. Devices with three different values of overlap length and channel length down to 0.5 μm are fabricated to experimentally investigate the scaling behavior of the transit frequency. Contact resistance and overlapping capacitance depend in opposite ways on LOV. These findings establish routes for the optimization of the dimension of source/drain contact pads and suggest design guidelines to achieve megahertz operation in flexible IGZO TFTs and circuits

TFTs as photodetectors for optical interconnects

In this work we are looking at the prospect of using poly-silicon based Thin Film Transistors (TFTs) as photodetectors for optical interconnects that can detect light effectively at 1100nm wavelength from silicon based Light Emitting Diodes (LEDs). These TFTs were fabricated from laser crystallized silicon and were characterized under darkness and illumination. The photosensitivities of these devices were limited due to the presence of aluminium as their gate electrode but have shown us the possibility of a new approach to photodetection

150°C amorphous silicon thin-film transistor technology for polyimide substrates

We have developed a 150°C technology for amorphous silicon thin-film transistors (a-Si:H TFTs) on polyimide substrates deposited by plasma enhanced chemical vapor deposition. The silicon nitride gate dielectric and the a-Si:H channel material were tailored to provide the least leakage current and midgap defect density, respectively. In addition, we conducted experiments on the TFT structure and fabrication with the aim of obtaining high electron mobility. TFTs with back-channel etch and channel-passivated structures were fabricated on glass or 51 μm thick polyimide foil. The a-Si:H TFTs have an on/off current ratio of ∼10 7 and an electron mobility of ∼0.7 cm 2/V s

Logic Ciucuits Using Solution-processed Single-walled Carbon Nanotue Transistors

This letter reports on the realization of logic circuits employing solution-processed networks of single-walled carbon nanotubes. We constructed basic logic gates (inverter, NAND and NOR) with n- and p-type field-effect transistors fabricated by solution-based chemical doping. Complementary metal-oxide-semiconductor inverters exhibited voltage gains of up to 20, which illustrates the great potential of carbon nanotube networks for printable flexible electronics.Comment: 12 PAGES, 3 FIGURE