TECHNIQUES FOR DIGITAL LOW DROPOUT REGULATOR MODELING AND TRANSIENT RESPONSE ENHANCEMENT

Low dropout regulators (LDOs) are important components for power management in modern integrated circuits. With the continued scaling down of power supply voltage, digital LDOs have become a more attractive design choice since they avoid the difficulty of designing high-gain amplifiers with low voltage. This thesis investigates techniques for both modeling and enhancement of digital LDO transient response. It discusses the importance of the resistance in the output stage of an LDO, and proposes a simulation model for examining LDO transient response. In addition, the thesis studies circuit techniques to improve LDO transient response. Different LDO circuits are implemented and compared in this study

LOW-POWER LOW-VOLTAGE ANALOG CIRCUIT TECHNIQUES FOR WIRELESS SENSORS

This research investigates lower-power lower-voltage analog circuit techniques suitable for wireless sensor applications. Wireless sensors have been used in a wide range of applications and will become ubiquitous with the revolution of internet of things (IoT). Due to the demand of low cost, miniature desirable size and long operating cycle, passive wireless sensors which don\u27t require battery are more preferred. Such sensors harvest energy from energy sources in the environment such as radio frequency (RF) waves, vibration, thermal sources, etc. As a result, the obtained energy is very limited. This creates strong demand for low power, lower voltage circuits. The RF and analog circuits in the wireless sensor usually consume most of the power. This motivates the research presented in the dissertation. Specially, the research focuses on the design of a low power high efficiency regulator, low power Resistance to Digital Converter (RDC), low power Successive Approximation Register (SAR) Analog to Digital Converter (ADC) with parasitic error reduction and a low power low voltage Low Dropout (LDO) regulator. This dissertation includes a low power analog circuit design for the RFID wireless sensor which consists of the energy harvest circuits (an optimized rectifier and a regulator with high current efficiency) and a sensor measurement circuit (RDC), a single end sampling SAR ADC with no error induced by the parasitic capacitance and a digital loop LDO whose line and load variation response is improved. These techniques will boost the design of the wireless sensor and they can also be used in other similar low power design