High bandwidth low power operational amplifier design and compensation techniques

The need for high bandwidth operational amplifiers (op amp) exists for numerous applications. This need requires research in the area of Op Amp bandwidth extension. The exploited method in this thesis uses a class of compensation called Indirect Feedback Frequency Compensation in which the compensation current is fed back indirectly from the output to an internal high impedance node, to extend the bandwidth of an Op Amp. Among various compensation methods for operational amplifiers, indirect compensation offers potentially large benefits in regards to power to speed trade-off. The indirect compensated Op Amps can exhibit significant improvements in speed over traditional Miller compensated Op Amps and result in much smaller layout size and lower power consumption. However the technique has not been widely used in practice due to a lack of clear design procedure. This thesis develops an analytical description of how indirect compensation works and derives key trade off equations among various specifications. These results provide the insight needed for practically designing operational amplifiers with this technique. Based on the results, a step-by-step design procedure is proposed for an operational amplifier using indirect compensation. To demonstrate the proposed design procedure, a two stage Op Amp is designed. The Op Amp achieved a 2 MHz gain-bandwidth product (GBW) driving a large capacitive load (100 pF). The GBW of the Op Amp was improved by a factor of 10 times compared to the miller compensation scheme. The amplifier documented in this thesis achieved a higher simulated figures-of-merit (FoMs) compared to the state-of-art and can be directly used in integrated systems to achieve higher performance

An improved reversed miller compensation technique for three-stage CMOS OTAs with double pole-zero cancellation and almost single-pole frequency response

This paper presents an improved reversed nested Miller compensation technique exploiting a single additional feed-forward stage to obtain double pole-zero cancellation and ideally single-pole behavior, in a three-stage Miller amplifier. The approach allows designing a three-stage operational transconductance amplifier (OTA) with one dominant pole and two (ideally) mutually cancelling pole-zero doublets. We demonstrate the robustness of the proposed cancellation technique, showing that it is not significantly influenced by process and temperature variations. The proposed design equations allow setting the unity-gain frequency of the amplifier and the complex poles' resonance frequency and quality factor. We introduce the notion of bandwidth efficiency to quantify the OTA performance with respect to a telescopic cascode OTA for given load capacitance and power consumption constraints and demonstrate analytically that the proposed approach allows a bandwidth efficiency that can ideally approach 100%. A CMOS implementation of the proposed compensation technique is provided, in which a current reuse scheme is used to reduce the total current consumption. The OTA has been designed using a 130-nm CMOS process by STMicroelectronics and achieves a DC gain larger than 120 dB, with almost single-pole frequency response. Monte Carlo simulations have been performed to show the robustness of the proposed approach to process, voltage, and temperature (PVT) variations and mismatches

Development of electronics for microultrasound capsule endoscopy

Development of intracorporeal devices has surged in the last decade due to advancements in the semiconductor industry, energy storage and low-power sensing systems. This work aims to present a thorough systematic overview and exploration of the microultrasound (µUS) capsule endoscopy (CE) field as the development of electronic components will be key to a successful applicable µUSCE device. The research focused on investigating and designing high-voltage (HV, < 36 V) generating and driving circuits as well as a low-noise amplifier (LNA) for battery-powered and volume-limited systems. In implantable applications, HV generation with maximum efficiency is required to improve the operational lifetime whilst reducing the cost of the device. A fully integrated hybrid (H) charge pump (CP) comprising a serial-parallel (SP) stage was designed and manufactured for > 20 V and 0 - 100 µA output capabilities. The results were compared to a Dickson (DKCP) occupying the same chip area; further improvements in the SPCP topology were explored and a new switching scheme for SPCPs was introduced. A second regulated CP version was excogitated and manufactured to use with an integrated µUS pulse generator. The CP was manufactured and tested at different output currents and capacitive loads; its operation with an US pulser was evaluated and a novel self-oscillating CP mechanism to eliminate the need of an auxiliary clock generator with a minimum area overhead was devised. A single-output universal US pulser was designed, manufactured and tested with 1.5 MHz, 3 MHz, and 28 MHz arrays to achieve a means of fully-integrated, low-power transducer driving. The circuit was evaluated for power consumption and pulse generation capabilities with different loads. Pulse-echo measurements were carried out and compared with those from a commercial US research system to characterise and understand the quality of the generated pulse. A second pulser version for a 28 MHz array was derived to allow control of individual elements. The work involved its optimisation methodology and design of a novel HV feedback-based level-shifter. A low-noise amplifier (LNA) was designed for a wide bandwidth µUS array with a centre frequency of 28 MHz. The LNA was based on an energy-efficient inverter architecture. The circuit encompassed a full power-down functionality and was investigated for a self-biased operation to achieve lower chip area. The explored concepts enable realisation of low power and high performance LNAs for µUS frequencies

Modelling, Analysis and Design of Optimised Electronic Circuits for Visible Light Communication Systems

This thesis explores new circuit design techniques and topologies to extend the bandwidth of visible light communication (VLC) transmitters and receivers, by ameliorating the bandwidth-limiting effects of commonly used optoelectronic devices. The thesis contains detailed literature review of transmitter and receiver designs, which inspired two directions of work. The first proposes new designs of optically lossless light emitting diode (LED) bandwidth extension technique that utilises a negative capacitance circuit to offset the diode’s bandwidth-limiting capacitance. The negative capacitance circuit was studied and verified through newly developed mathematical analysis, modelling and experimental demonstration. The bandwidth advantage of the proposed technique was demonstrated through measurements in conjunction with several colour LEDs, demonstrating up to 500% bandwidth extension with no loss of optical power. The second direction of work enhances the bandwidth of VLC receivers through new designs of ultra-low input impedance transimpedance amplifiers (TIAs), designed to be insensitive to the high photodiode capacitances (Cpd) of large area detectors. Moreover, the thesis proposes a new circuit, which modifies the traditional regulated cascode (RGC) circuit to enhance its bandwidth and gain. The modified RGC amplifier efficiently treats significant RGC inherent bandwidth limitations and is shown, through mathematical analysis, modelling and experimental measurements to extend the bandwidth further by up to 200%. The bandwidth advantage of such receivers was demonstrated in measurements, using several large area photodiodes of area up to 600 mm^2, resulting in a substantial bandwidth improvement of up to 1000%, relative to a standard 50 Ω termination. An inherent limitation of large area photodiodes, associated with internal resistive elements, was identified and ameliorated, through the design of negative resistance circuits. Altogether, this research resulted in a set of design methods and practical circuits, which will hopefully contribute to wider adoption of VLC systems and may be applied in areas beyond VLC

Materials, Device, and System Integration of Amorphous Oxide Semiconductor TFTs

Amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) have great potential for use in the next-generation of electronics. AOS TFTs can be used to fabricate circuits and sensors on various substrates, due to unique properties, including high mobility, excellent uniformity, and it requiring a low-temperature process. Currently, indium gallium zinc oxide (IGZO) is the predominant AOS used in the display industry as a TFT semiconductor. Although the IGZO technology is very mature, the development of AOS continues. Additional AOSs are being investigated to reduce cost and improve stability. Considering availability and the potential of materials, indium silicon oxide (ISO) was selected for this project. ISO uses silicon to suppress the instability originating from the oxygen vacancy. The silicon-oxygen bond has a higher dissociation energy, which improves retention of oxygen atoms in the film, and thus, increases the transistor’s stability. This detailed study follows a bottom-up approach. It starts with the fabrication and characterisation of materials. Basic material properties of the ISO film are discussed within, including amorphicity, bandgap, stoichiometry, and Hall-effect parameters. Based on the characterisation results, different deposition recipes for the TFT were developed and tested. The interface quality and etching selectivity were investigated. Uniformity and stability data were extracted from a TFT array using the developed photo-lithography process, which was used to verify and quantitate the capability of the process in system integration and circuit design. A Monte-Carlo simulation environment was established based on the extracted data. The two urgent challenges in all-TFT analogue circuit design, the lack of proper active load and the large parasitic capacitance, were investigated. In-depth analysis on these two issues and applicable solutions were presented. Investigation on system integration of TFT circuits and sensors were conducted, since the device demonstrated the required performance and uniformity. An all-TFT differential-input amplifier was designed and verified, as the first mixed signal all-TFT circuit.China Scholarship Council Cambridge Trus

Development and implementation of a deflection amplification mechanism for capacitive accelerometers

Micro-Electro-Mechanical-Systems (MEMS) and especially physical sensors are part of a flourishing market ranging from consumer electronics to space applications. They have seen a great evolution throughout the last decades, and there is still considerable research effort for further improving their performance. This is reflected by the plethora of commercial applications using them but also by the demand from industry for better specifications. This demand together with the needs of novel applications fuels the research for better physical sensors.Applications such as inertial, seismic, and precision tilt sensing demand very high sensitivity and low noise. Bulk micromachined capacitive inertial sensors seem to be the most viable solution as they offer a large inertial mass, high sensitivity, good noise performance, they are easy to interface with, and of low cost. The aim of this thesis is to improve the performance of bulk micromachined capacitive sensors by enhancing their sensitivity and noise floor.MEMS physical sensors, most commonly, rely on force coupling and a resulting deflection of a proof mass or membrane to produce an output proportional to a stimulus of the physical quantity to be measured. Therefore, the sensitivity to a physical quantity may be improved by increasing the resulting deflection of a sensor. The work presented in this thesis introduces an approach based on a mechanical motion amplifier with the potential to improve the performance of mechanical MEMS sensors that rely on deflection to produce an output signal.The mechanical amplifier is integrated with the suspension system of a sensor. It comprises a system of micromachined levers (microlevers) to enhance the deflection of a proof mass caused by an inertial force. The mechanism can be used in capacitive accelerometers and gyroscopes to improve their performance by increasing their output signal. As the noise contribution of the electronic read-out circuit of a MEMS sensor is, to first order, independent of the amplitude of its input signal, the overall signal-to-noise ratio (SNR) of the sensor is improved.There is a rather limited number of reports in the literature for mechanical amplification in MEMS devices, especially when applied to amplify the deflection of inertial sensors. In this study, after a literature review, mathematical and computational methods to analyse the behaviour of microlevers were considered. By using these methods the mechanical and geometrical characteristics of microlevers components were evaluated. In order to prove the concept, a system of microlevers was implemented as a mechanical amplifier in capacitive accelerometers.All the mechanical structures were simulated using Finite Element Analysis (FEA) and system level simulations. This led to first order optimised devices that were used to design appropriate masks for fabrication. Two main fabrication processes were used; a Silicon on Insulator (SOI) process and a Silicon on Glass (SoG) process. The SOI process carried out at the University of Southampton evolved from a one mask to a two mask dicing free process with a yield of over 95%, in its third generation. The SoG is a well-established process at the University of Peking that uses three masks.The sensors were evaluated using both optical and electrical means. The results from the first prototype sensor design (1HAN) revealed an amplification factor of 40 and a mechanically amplified sensitivity of 2.39V/g. The measured natural frequency of the first mode of the sensor was at 734Hz and the full-scale measurement range was up to 7g with a maximum nonlinearity of 2%. The measurements for all the prototype sensor designs were very close to the predicted values with the highest discrepancy being 22%. The results of this research show that mechanical amplification is a very promising concept that can offer increased sensitivity in inertial sensors without increasing the noise. Experimental results show that there is plenty of room for improvement and that viable solutions may be produced by using the presented approach. The applications of this scheme are not restricted only to inertial sensors but as the results show it can be used in a broader range of micromachined devices

RF-IV waveform engineering inspired MMIC design

The research work presented in this thesis sets out to investigate improvements to the power amplifier (PA) design cycle through the use of Waveform Engineering techniques. This is approached using alternative simulation methods with strong links to the data available from time domain based radio frequency waveform measurement and characterisation systems. One key objective of this work is to improve the overall efficiency of the radiofrequency power amplifier stage by focusing on circuit design. More specifically, the direct utilisation of waveform-engineering techniques in the development of multi-stage amplifiers to improve power added efficiency was targeted. In developing these power amplifier design methodologies, the techniques are demonstrated and validated using monolithic microwave integrated circuit (MMIC) implementation. This work has also led to an increase in understanding of the operation of the device terminal waveforms which is used to drive an alternative simulation approach. Through the use of standard computer-aided design (CAD) device models and measured waveform data, a 2-stage MMIC Gallium Nitride power amplifier has been detailed. This amplifier also uses internal node probe points in the interstage matching network, along with a new application of the waveform measurement system, to allow investigation of the terminal waveforms to validate the performance. This direct implementation of these waveform measurements provides valuable information on the design of the interstage networks to reduce the number of design iterations resulting in a more efficient design process. Waveform-engineering-based designs completed in this research have been demonstrated with test circuits and the time domain measurement system to demonstrate new modes of operation, as well as complete designs realised as prototype MMIC power amplifiers