Steady state analysis of pwm dc-to-dc regulators

A new method for steady-state analysis of pulsewidth modulation (PWM) hard-switching dc-to-dc regulators is presented. The power stage and the feedback control circuit are analyzed as two interconnected blocks. The intersection of their open-loop dc steady-state characteristics with the ramp voltage provides a guess candidate steady-state solution (CS). An iterative process is used to validate it as true steady-state solution (TS) when the bias conditions of switching devices (SDs) are fulfilled everywhere in the switching period

Steady-state analysis of PWM DC-to-DC regulators

In this paper a new method of steady-state analysis of feedback-regulated PWM hard-switching DC-to-DC converters (Hard-Switching Regulators - HSR) is presented. The power stage and the feedback control circuit forming the HSR are modeled separately and analyzed as two interconnected blocks. The intersection of the open loop DC steady-state characteristics of these cascaded blocks with the ramp voltage provides a suitable starting solution of the duty-cycle, thanks to which a guess Candidate steady-state Solution (CS) is determined. The CS approaches the True steady-state Solution (TS) through an iterative process of validation. An example of application is presented