Automating defects simulation and fault modeling for SRAMs

The continues improvement in manufacturing process density for very deep sub micron technologies constantly leads to new classes of defects in memory devices. Exploring the effect of fabrication defects in future technologies, and identifying new classes of realistic functional fault models with their corresponding test sequences, is a time consuming task up to now mainly performed by hand. This paper proposes a new approach to automate this procedure. The proposed method exploits the capabilities of evolutionary algorithms to automatically identify faulty behaviors into defective memories and to define the corresponding fault models and relevant test sequences. Target defects are modeled at the electrical level in order to optimize the results to the specific technology and memory architecture

A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs

Among the different types of algorithms proposed to test static random access memories (SRAMs), march tests have proven to be faster, simpler and regularly structured. A large number of march tests with different fault coverage have been published. Usually different march tests detect only a specific set of memory faults. The always growing memory production technology introduces new classes of fault, making a key hurdle the generation of new march tests. The aim of this paper is to target the whole set of realistic fault model and to provide a unique march test able to reduce the test complexity of 15.4% than state-of-the-art march algorith

Genetic Defect Based March Test Generation for SRAM

The continuos shrinking of semiconductor's nodes makes semiconductor memories increasingly prone to electrical defects tightly related to the internal structure of the memory. Exploring the effect of fabrication defects in future technologies, and identifying new classes of functional fault models with their corresponding test sequences, is a time consuming task up to now mainly performed by hand. This paper pro- poses a new approach to automate this procedure exploiting a dedicated genetic algorithm

A 22n March Test for Realistic Static Linked Faults in SRAMs

Linked faults are considered an interesting class of memory faults. Their capability of influencing the behavior of other faults causes the hiding of the fault effect and makes test algorithm design a very complex task. Although several March tests have been developed for the wide memory faults spread, a few of them are able to detect linked faults. In the present paper March AB, a March test targeting the set of realistic memory linked fault is presented. Comparison results show that the proposed March test provides the same fault coverage of already published algorithms but, it reduces the test complexity and therefore the test time. Moreover, a complete taxonomy of linked faults will be presente

March AB, March AB1: new March tests for unlinked dynamic memory faults

Among the different types of algorithms proposed to test static random access memories (SRAMs), March tests have proven to be faster, simpler and regularly structured. New memory production technologies introduce new classes of faults usually referred to as dynamic memory faults. A few March tests for dynamic fault, with different fault coverage, have been published. In this paper, we propose new March tests targeting unlinked dynamic faults with lower complexity than published ones. Comparison results show that the proposed March tests provide the same fault coverage of the known ones, but they reduce the test complexity, and therefore the test tim

March CRF: an Efficient Test for Complex Read Faults in SRAM Memories

In this paper we study Complex Read Faults in SRAMs, a combination of various malfunctions that affect the read operation in nanoscale memories. All the memory elements involved in the read operation are studied, underlining the causes of the realistic faults concerning this operation. The requirements to cover these fault models are given. We show that the different causes of read failure are independent and may coexist in nanoscale SRAMs, summing their effects and provoking Complex Read Faults, CRFs. We show that the test methodology to cover this new read faults consists in test patterns that match the requirements to cover all the different simple read fault models. We propose a low complexity (?2N) test, March CRF, that covers effectively all the realistic Complex Read Fault

Automatic March Tests Generations for Static Linked Faults in SRAMs

Static linked faults are considered an interesting class of memory faults. Their capability of influencing the behavior of other faults causes the hiding of the fault effect and makes test algorithm design a very complex task. A large number of March tests with different fault coverage have been published and some methodologies have been presented to automatically generate March tests. In this paper we present an approach to automatically generate March tests for static linked faults. The proposed approach generates better test algorithms then previous, by reducing the test lengt

Functional Testing Approaches for "BIFST-able" tlm_fifo

Evolution of Electronic System Level design methodologies, allows a wider use of Transaction-Level Modeling (TLM). TLM is a high-level approach to modeling digital systems that emphasizes on separating communications among modules from the details of functional units. This paper explores different functional testing approaches for the implementation of Built-in Functional Self Test facilities in the TLM primitive channel tlm_fifo. In particular, it focuses on three different test approaches based on a finite state machine model of tlm_fifo, functional fault models, and march tests respectivel