129,856 research outputs found

    Test exploration and validation using transaction level models

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    The complexity of the test infrastructure and test strategies in systems-on-chip approaches the complexity of the functional design space. This paper presents test design space exploration and validation of test strategies and schedules using transaction level models (TLMs). Since many aspects of testing involve the transfer of a significant amount of test stimuli and responses, the communication-centric view of TLMs suits this purpose exceptionally wel

    Formal and Informal Methods for Multi-Core Design Space Exploration

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    We propose a tool-supported methodology for design-space exploration for embedded systems. It provides means to define high-level models of applications and multi-processor architectures and evaluate the performance of different deployment (mapping, scheduling) strategies while taking uncertainty into account. We argue that this extension of the scope of formal verification is important for the viability of the domain.Comment: In Proceedings QAPL 2014, arXiv:1406.156

    An application generator for rapid prototyping of Ada real-time control software

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    The need to increase engineering productivity and decrease software life cycle costs in real-time system development establishes a motivation for a method of rapid prototyping. The design by iterative rapid prototyping technique is described. A tool which facilitates such a design methodology for the generation of embedded control software is described

    Support for energy-oriented design in the Australian context

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    There is a need for decision support tools that integrate energy simulation into early design in the context of Australian practice. Despite the proliferation of simulation programs in the last decade, there are no ready-to-use applications that cater specifically for the Australian climate and regulations. Furthermore, the majority of existing tools focus on achieving interaction with the design domain through model-based interoperability, and largely overlook the issue of process integration. This paper proposes an energy-oriented design environment that both accommodates the Australian context and provides interactive and iterative information exchanges that facilitate feedback between domains. It then presents the structure for DEEPA, an openly customisable system that couples parametric modelling and energy simulation software as a means of developing a decision support tool to allow designers to rapidly and flexibly assess the performance of early design alternatives. Finally, it discusses the benefits of developing a dynamic and concurrent performance evaluation process that parallels the characteristics and relationships of the design process

    Direct NN-body code on low-power embedded ARM GPUs

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    This work arises on the environment of the ExaNeSt project aiming at design and development of an exascale ready supercomputer with low energy consumption profile but able to support the most demanding scientific and technical applications. The ExaNeSt compute unit consists of densely-packed low-power 64-bit ARM processors, embedded within Xilinx FPGA SoCs. SoC boards are heterogeneous architecture where computing power is supplied both by CPUs and GPUs, and are emerging as a possible low-power and low-cost alternative to clusters based on traditional CPUs. A state-of-the-art direct NN-body code suitable for astrophysical simulations has been re-engineered in order to exploit SoC heterogeneous platforms based on ARM CPUs and embedded GPUs. Performance tests show that embedded GPUs can be effectively used to accelerate real-life scientific calculations, and that are promising also because of their energy efficiency, which is a crucial design in future exascale platforms.Comment: 16 pages, 7 figures, 1 table, accepted for publication in the Computing Conference 2019 proceeding
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