Scheme for constructing graphs associated with stabilizer quantum codes

We propose a systematic scheme for the construction of graphs associated with binary stabilizer codes. The scheme is characterized by three main steps: first, the stabilizer code is realized as a codeword-stabilized (CWS) quantum code; second, the canonical form of the CWS code is uncovered; third, the input vertices are attached to the graphs. To check the effectiveness of the scheme, we discuss several graphical constructions of various useful stabilizer codes characterized by single and multi-qubit encoding operators. In particular, the error-correcting capabilities of such quantum codes are verified in graph-theoretic terms as originally advocated by Schlingemann and Werner. Finally, possible generalizations of our scheme for the graphical construction of both (stabilizer and nonadditive) nonbinary and continuous-variable quantum codes are briefly addressed.Comment: 42 pages, 12 figure

Perfect nonbinary AN codes with distance three

It has been proved that the perfect binary and ternary single error correcting AN codes exist.In this paper, perfect radix-r single error correcting codes of type I and II are defined as generalized versions of perfect binary codes, and a general theory is developed for the existence of perfect single error correcting AN codes by using number theoretic concepts.This leads us to the followings:(1)There do not exist perfect radix 4k2 codes of type I and perfect radix k2 codes of type II.(2)In the cases of radix 4, 5, 8 and 9, no perfect code of either type exists.(3)There exist perfect codes with radices 6 and 7

Parallel Nonbinary LDPC Decoding on GPU

Nonbinary Low-Density Parity-Check (LDPC) codes are a class of error-correcting codes constructed over the Galois field GF(q) for q > 2. As extensions of binary LDPC codes, nonbinary LDPC codes can provide better error-correcting performance when the code length is short or moderate, but at a cost of higher decoding complexity. This paper proposes a massively parallel implementation of a nonbinary LDPC decoding accelerator based on a graphics processing unit (GPU) to achieve both great flexibility and scalability. The implementation maps the Min-Max decoding algorithm to GPU’s massively parallel architecture. We highlight the methodology to partition the decoding task to a heterogeneous platform consisting of the CPU and GPU. The experimental results show that our GPUbased implementation can achieve high throughput while still providing great flexibility and scalability.National Science Foundation (NSF

Systematic redundant residue number system codes: analytical upper bound and iterative decoding performance over AWGN and Rayleigh channels

The novel family of redundant residue number system (RRNS) codes is studied. RRNS codes constitute maximum–minimum distance block codes, exhibiting identical distance properties to Reed–Solomon codes. Binary to RRNS symbol-mapping methods are proposed, in order to implement both systematic and nonsystematic RRNS codes. Furthermore, the upper-bound performance of systematic RRNS codes is investigated, when maximum-likelihood (ML) soft decoding is invoked. The classic Chase algorithm achieving near-ML soft decoding is introduced for the first time for RRNS codes, in order to decrease the complexity of the ML soft decoding. Furthermore, the modified Chase algorithm is employed to accept soft inputs, as well as to provide soft outputs, assisting in the turbo decoding of RRNS codes by using the soft-input/soft-output Chase algorithm. Index Terms—Redundant residue number system (RRNS), residue number system (RNS), turbo detection