3 research outputs found

    Shared cache aware task mapping for WCRT minimization

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    10.1109/ASPDAC.2013.6509688Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC735-74

    A Survey of Timing Verification Techniques for Multi-Core Real-Time Systems

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    This survey provides an overview of the scientific literature on timing verification techniques for multi-core real-time systems. It reviews the key results in the field from its origins around 2006 to the latest research published up to the end of 2018. The survey highlights the key issues involved in providing guarantees of timing correctness for multi-core systems. A detailed review is provided covering four main categories: full integration, temporal isolation, integrating interference effects into schedulability analysis, and mapping and allocation. The survey concludes with a discussion of the advantages and disadvantages of these different approaches, identifying open issues, key challenges, and possible directions for future research

    Instruction Cache Optimizations in Embedded Real-Time Systems

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    Ph.DDOCTOR OF PHILOSOPH
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