9,348 research outputs found
The driver concept for the DLR Lightweight Robot III
In this paper we present the synchronization and
driver architecture of the DLR LWR-III, which supplies an easy
to use interface for applications. For our purpose we abstracted
the robot hardware entirely from the control algorithms using
the common device driver concept of modern operating systems.
The software architecture is split into two modular parts. On
the one side, there are device drivers that communicate with the
hardware components. On the other side, there are realtime ap-
plications realized as Simulink Models, which provide advanced
control algorithms. This ensures a clean separation between the
two modules and provides a communication over a common
and approved interface. Furthermore we investigated how we
can ensure synchronization to the hardware over the device
driver interfaces and how we can ensure that it meets hard
realtime requirements. The main result of this paper is to realize
a synchronization between LWR-III hardware and Simulink
control applications while targeting small latencies with respect
to hard realtime requirements. The design is implemented and
verified on WindRiverTM VxWorksTM
Rational physical agent reasoning beyond logic
The paper addresses the problem of defining a theoretical physical agent framework that satisfies practical requirements of programmability by non-programmer engineers and at the same time permitting fast realtime operation of agents on digital computer networks. The objective of the new framework is to enable the satisfaction of performance requirements on autonomous vehicles and robots in space exploration, deep underwater exploration, defense reconnaissance, automated manufacturing and household automation
Modular and composable extensions to smalltalk using composition filters
Current and future trends in computer science require extensions to Smalltalk. Rather than arguing for particular language mechanisms to deal with specific requirements, in this position paper we want to make a case for two requirements that Smalltalk extensions should fulfill. The first is that the extensions must be integrated with Smalltalk without violating its basic object model. The second requirement is that extensions should allow for defining objects that are still adaptable, extensible and reusable, and in particular do not cause inheritance anomalies. We propose the composition filters model as a framework for language extensions that fulfills these criteria. Its applicability to solving various modeling problems is briefly illustrated
A Survey of Prediction and Classification Techniques in Multicore Processor Systems
In multicore processor systems, being able to accurately predict the future provides new optimization opportunities, which otherwise could not be exploited. For example, an oracle able to predict a certain application\u27s behavior running on a smart phone could direct the power manager to switch to appropriate dynamic voltage and frequency scaling modes that would guarantee minimum levels of desired performance while saving energy consumption and thereby prolonging battery life. Using predictions enables systems to become proactive rather than continue to operate in a reactive manner. This prediction-based proactive approach has become increasingly popular in the design and optimization of integrated circuits and of multicore processor systems. Prediction transforms from simple forecasting to sophisticated machine learning based prediction and classification that learns from existing data, employs data mining, and predicts future behavior. This can be exploited by novel optimization techniques that can span across all layers of the computing stack. In this survey paper, we present a discussion of the most popular techniques on prediction and classification in the general context of computing systems with emphasis on multicore processors. The paper is far from comprehensive, but, it will help the reader interested in employing prediction in optimization of multicore processor systems
PRISE: An Integrated Platform for Research and Teaching of Critical Embedded Systems
In this paper, we present PRISE, an integrated workbench for Research and Teaching of critical embedded systems at ISAE, the French Institute for Space and Aeronautics Engineering. PRISE is built around state-of-the-art technologies for the engineering of space and avionics systems used in Space and Avionics domain. It aims at demonstrating key aspects of critical, real-time, embedded systems used in the transport industry, but also validating new scientific contributions for the engineering of software functions. PRISE combines embedded and simulation platforms, and modeling tools. This platform is available for both research and teaching. Being built around widely used commercial and open source software; PRISE aims at being a reference platform for our teaching and research activities at ISAE
Design of an embedded microcomputer based mini quadrotor UAV
This paper describes the design and realization of a mini quadrotor UAV (Unmanned Aerial Vehicle) that has been initiated in the Systems and Control Laboratory at the Computer and Automation Research institute of the Hungarian Academy of Science in collaboration with control departments of the Budapest University of Technology and Economics. The mini quadrotor UAV is intended to use in several areas such as camera-based air-surveillance, traffic control, environmental measurements, etc. The paper focuses upon the embedded microcomputer-based implementation of the mini UAV, describes the elements of the implementation, the tools realized for mathematical model building, as well as obtains a brief outline of the control design
Real-Time Distributed Aircraft Simulation through HLA
This paper presents some ongoing researches carried out in the context of the PRISE (Research Platform for Embedded Systems Engineering) Project. This platform has been designed to evaluate and validate new embedded system concepts and techniques through a special hardware and software environment. Since many actual embedded equipments are not available, their corresponding behavior is simulated using the HLA architecture, an IEEE standard for distributed simulation, and a Run-time infrastructure called CERTI and developed at ONERA. HLA is currently largely used in many simulation applications, but the limited performances of the RTIs raises doubts over the feasibility of HLA federations with real-time requirements. This paper addresses the problem of achieving real-time performances with HLA. Several experiments are discussed using well-known aircraft simulators such as the Microsoft Flight Simulator, FlightGear, and X-plane connected with the CERTI Run-time Infrastructure. The added value of these activities is to demonstrate that according to a set of innovative solutions, HLA is well suited to achieve hard real time constraints
Towards the Model-Driven Engineering of Secure yet Safe Embedded Systems
We introduce SysML-Sec, a SysML-based Model-Driven Engineering environment
aimed at fostering the collaboration between system designers and security
experts at all methodological stages of the development of an embedded system.
A central issue in the design of an embedded system is the definition of the
hardware/software partitioning of the architecture of the system, which should
take place as early as possible. SysML-Sec aims to extend the relevance of this
analysis through the integration of security requirements and threats. In
particular, we propose an agile methodology whose aim is to assess early on the
impact of the security requirements and of the security mechanisms designed to
satisfy them over the safety of the system. Security concerns are captured in a
component-centric manner through existing SysML diagrams with only minimal
extensions. After the requirements captured are derived into security and
cryptographic mechanisms, security properties can be formally verified over
this design. To perform the latter, model transformation techniques are
implemented in the SysML-Sec toolchain in order to derive a ProVerif
specification from the SysML models. An automotive firmware flashing procedure
serves as a guiding example throughout our presentation.Comment: In Proceedings GraMSec 2014, arXiv:1404.163
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