Numerical Representation of Directed Acyclic Graphs for Efficient Dataflow Embedded Resource Allocation

International audienceStream processing applications running on Heterogeneous Multi-Processor Systems on Chips (HMPSoCs) require efficient resource allocation and management, both at compile-time and at runtime. To cope with modern adaptive applications whose behavior can not be exhaustively predicted at compile-time, runtime managers must be able to take resource allocation decisions on-the-fly, with a minimum overhead on application performance. Resource allocation algorithms often rely on an internal modeling of an application. Directed Acyclic Graph (DAGs) are the most commonly used models for capturing control and data dependencies between tasks. DAGs are notably often used as an intermediate representation for deploying applications modeled with a dataflow Model of Computation (MoC) on HMPSoCs. Building such intermediate representation at runtime for massively parallel applications is costly both in terms of computation and memory overhead. In this paper, an intermediate representation of DAGs for resource allocation is presented. This new representation shows improved performance for run-time analysis of dataflow graphs with less overhead in both computation time and memory footprint. The performances of the proposed representation are evaluated on a set of computer vision and machine learning applications

Relaxed Subgraph Execution Model for the Throughput Evaluation of IBSDF Graphs

International audienceThe Interface-Based Synchronous Dataflow (IBSDF) Model of Computation (MoC) is a hierarchical extension of the well-known Synchronous Dataflow (SDF) MoC. The IBSDF model extends the semantics of the SDF model by introducing a graph composition mechanism based on hierarchical interfaces. The IBSDF model introduces also execution rules to ease the analysis of the IBSDF graph such as evaluating the throughput; an essential key performance to evaluate when designing Digital Signal Processing (DSP) systems. However, respecting the execution rules may slow down the execution of IBSDF graphs, and so stop the applications to reach their maximum throughput. This article presents first how to speed-up the execution of an IBSDF graph by relaxing the execution rules. Second, a new method to compute the throughput of IBSDF graphs under a relaxed execution. Finally, a performance comparison between the proposed method and basic methods that rely on a transformation of the IBSDF graph to an equivalent non-hierarchical graph of potentially exponential size. The proposed method outperforms basic methods and makes it possible to evaluate the maximum throughput of large IBSDF graphs in less than 2 seconds