CMOS optical-sensor array with high output current levels and automatic signal-range centring

A CMOS compatible photosensor with high output current levels, and an area-efficient scheme for automatic signal-range centring according to illumination conditions are presented. The high output current levels allow the use of these devices in continuoustime asynchronous imagers, as well as in high-sampling-frequency applications

Smart-Pixel Cellular Neural Networks in Analog Current-Mode CMOS Technology

This paper presents a systematic approach to design CMOS chips with concurrent picture acquisition and processing capabilities. These chips consist of regular arrangements of elementary units, called smart pixels. Light detection is made with vertical CMOS-BJT’s connected in a Darlington structure. Pixel smartness is achieved by exploiting the Cellular Neural Network paradigm [1], [2], incorporating at each pixel location an analog computing cell which interacts with those of nearby pixels. We propose a current-mode implementation technique and give measurements from two 16 x 16 prototypes in a single-poly double-metal CMOS n-well 1.6-µm technology. In addition to the sensory and processing circuitry, both chips incorporate light-adaptation circuitry for automatic contrast adjustment. They obtain smart-pixel densities up to 89 units/mm2, with a power consumption down to 105 µW/unit and image processing times below 2 µs

Rapid mapping of digital integrated circuit logic gates via multi-spectral backside imaging

Modern semiconductor integrated circuits are increasingly fabricated at untrusted third party foundries. There now exist myriad security threats of malicious tampering at the hardware level and hence a clear and pressing need for new tools that enable rapid, robust and low-cost validation of circuit layouts. Optical backside imaging offers an attractive platform, but its limited resolution and throughput cannot cope with the nanoscale sizes of modern circuitry and the need to image over a large area. We propose and demonstrate a multi-spectral imaging approach to overcome these obstacles by identifying key circuit elements on the basis of their spectral response. This obviates the need to directly image the nanoscale components that define them, thereby relaxing resolution and spatial sampling requirements by 1 and 2 - 4 orders of magnitude respectively. Our results directly address critical security needs in the integrated circuit supply chain and highlight the potential of spectroscopic techniques to address fundamental resolution obstacles caused by the need to image ever shrinking feature sizes in semiconductor integrated circuits

A multi-view approach to cDNA micro-array analysis

The official published version can be obtained from the link below.Microarray has emerged as a powerful technology that enables biologists to study thousands of genes simultaneously, therefore, to obtain a better understanding of the gene interaction and regulation mechanisms. This paper is concerned with improving the processes involved in the analysis of microarray image data. The main focus is to clarify an image's feature space in an unsupervised manner. In this paper, the Image Transformation Engine (ITE), combined with different filters, is investigated. The proposed methods are applied to a set of real-world cDNA images. The MatCNN toolbox is used during the segmentation process. Quantitative comparisons between different filters are carried out. It is shown that the CLD filter is the best one to be applied with the ITE.This work was supported in part by the Engineering and Physical Sciences Research Council (EPSRC) of the UK under Grant GR/S27658/01, the National Science Foundation of China under Innovative Grant 70621001, Chinese Academy of Sciences under Innovative Group Overseas Partnership Grant, the BHP Billiton Cooperation of Australia Grant, the International Science and Technology Cooperation Project of China under Grant 2009DFA32050 and the Alexander von Humboldt Foundation of Germany

A computer-based product classification and component detection for demanufacturing processes

This is an Author's Accepted Manuscript of an article published in International Journal of Computer Integrated Manufacturing, 24(10), 900-914, 2011 [copyright Taylor & Francis], available online at: http://www.tandfonline.com/10.1080/0951192X.2011.579169.The aim of this paper is to propose a novel computer-based product classification, component detection and tracking for demanufacturing and disassembly process. This is achieved by introducing a series of automated and sequential product scanning, component identification, image analysis and sorting – leading to the development of a bill of material (BOM). The produced BOM can then be associated with the relevant disassembly/demanufacture proviso. The proposed integrated image sorting and product classification (ISPC) approach can be considered as a step forward in automation of demanufacturing activities. The ISPC model proposed in this paper utilises and builds on the state-of-the-art technology and current body of research in computer-integrated demanufacturing and remanufacturing (CIDR). An appraisal of the latest research material and the factors that inhibit CIDR methods inpractice are presented. A novel solution for the integration of imaging and material identification techniques toovercome some of the existing shortcomings of automated recycling processes is proposed in this paper. The proposed product scanning and component detection ISPC software consists of four distinct models: the repertory database, the search engine, the product-attributes updater and the image sorting and classification algorithm. The software framework that integrates the four components is presented in this paper. Finally, an overall assessment of applying ISPC at various stages of CIDR processes concludes the article.University of Ibadan MacArthur Foundation Gran

A micropower centroiding vision processor

Published versio