Verifying Real-Time Systems using Explicit-time Description Methods

Timed model checking has been extensively researched in recent years. Many new formalisms with time extensions and tools based on them have been presented. On the other hand, Explicit-Time Description Methods aim to verify real-time systems with general untimed model checkers. Lamport presented an explicit-time description method using a clock-ticking process (Tick) to simulate the passage of time together with a group of global variables for time requirements. This paper proposes a new explicit-time description method with no reliance on global variables. Instead, it uses rendezvous synchronization steps between the Tick process and each system process to simulate time. This new method achieves better modularity and facilitates usage of more complex timing constraints. The two explicit-time description methods are implemented in DIVINE, a well-known distributed-memory model checker. Preliminary experiment results show that our new method, with better modularity, is comparable to Lamport's method with respect to time and memory efficiency

Real time systems and public information

Using computer technology in future public information system

Recent Advances in Real-Time Load-Pull Systems

In this paper, some of the latest advances in real-time load-pull technologies will be described. A recently introduced ultralow-loss directional coupler, which has been designed and realized by the authors, provides a number of advantages when used in load-pull test sets. This device has been called the load-pull head. The new ultralow-loss load-pull head can transform any passive precalibrated load-pull system into an easily calibrated and accurate real-time load-pull test set, without losing highreflection- coefficient capabilities. Moreover, if used to realize an active loop, the load-pull head reduces the risks of oscillations and the amount of the loop amplifier output power. As an example application, measurements with a passive real-time load-pull setup of a 30-W laterally diffused MOS (LDMOS) transistor are presented. Furthermore, some advice to bypass the remaining unavoidable losses due to probes and cables is given.We will show, with measurements and with very simple calculations, that the combined use of load-pull heads, a passive tuner, and an active loop not only boosts the available ΓL but also decreases the loop amplifier output power, with a sensible reduction in the overall cost of the syste