MGSim - Simulation tools for multi-core processor architectures

MGSim is an open source discrete event simulator for on-chip hardware components, developed at the University of Amsterdam. It is intended to be a research and teaching vehicle to study the fine-grained hardware/software interactions on many-core and hardware multithreaded processors. It includes support for core models with different instruction sets, a configurable multi-core interconnect, multiple configurable cache and memory models, a dedicated I/O subsystem, and comprehensive monitoring and interaction facilities. The default model configuration shipped with MGSim implements Microgrids, a many-core architecture with hardware concurrency management. MGSim is furthermore written mostly in C++ and uses object classes to represent chip components. It is optimized for architecture models that can be described as process networks.Comment: 33 pages, 22 figures, 4 listings, 2 table

Logic-Based Specification Languages for Intelligent Software Agents

The research field of Agent-Oriented Software Engineering (AOSE) aims to find abstractions, languages, methodologies and toolkits for modeling, verifying, validating and prototyping complex applications conceptualized as Multiagent Systems (MASs). A very lively research sub-field studies how formal methods can be used for AOSE. This paper presents a detailed survey of six logic-based executable agent specification languages that have been chosen for their potential to be integrated in our ARPEGGIO project, an open framework for specifying and prototyping a MAS. The six languages are ConGoLog, Agent-0, the IMPACT agent programming language, DyLog, Concurrent METATEM and Ehhf. For each executable language, the logic foundations are described and an example of use is shown. A comparison of the six languages and a survey of similar approaches complete the paper, together with considerations of the advantages of using logic-based languages in MAS modeling and prototyping.Comment: 67 pages, 1 table, 1 figure. Accepted for publication by the Journal "Theory and Practice of Logic Programming", volume 4, Maurice Bruynooghe Editor-in-Chie

HERO: Heterogeneous Embedded Research Platform for Exploring RISC-V Manycore Accelerators on FPGA

Heterogeneous embedded systems on chip (HESoCs) co-integrate a standard host processor with programmable manycore accelerators (PMCAs) to combine general-purpose computing with domain-specific, efficient processing capabilities. While leading companies successfully advance their HESoC products, research lags behind due to the challenges of building a prototyping platform that unites an industry-standard host processor with an open research PMCA architecture. In this work we introduce HERO, an FPGA-based research platform that combines a PMCA composed of clusters of RISC-V cores, implemented as soft cores on an FPGA fabric, with a hard ARM Cortex-A multicore host processor. The PMCA architecture mapped on the FPGA is silicon-proven, scalable, configurable, and fully modifiable. HERO includes a complete software stack that consists of a heterogeneous cross-compilation toolchain with support for OpenMP accelerator programming, a Linux driver, and runtime libraries for both host and PMCA. HERO is designed to facilitate rapid exploration on all software and hardware layers: run-time behavior can be accurately analyzed by tracing events, and modifications can be validated through fully automated hard ware and software builds and executed tests. We demonstrate the usefulness of HERO by means of case studies from our research

Chain-wide learning for inclusive agrifood market development : a guide to multi-stakeholder processes for linking small-scale producers to modern markets

This guide provides a set of concepts and analytical tools for finding ways to better link small-scale producers to the modern markets associated with today’s largescale supermarket retail and wholesale operations. It is has been developed through iterative testing with partners in several organisations and countries. The guide is a product of the Regoverning Markets Programme, a multi-agency programme to generate strategic information and anticipatory policy advice on small-scale producers in these fast changing markets

Evaluating Interaction Techniques in an Interactive Workspace: Comparing the Effectiveness of a Textual Interface, Virtual Paths Interface, and ARIS

ARIS is an interface that enables users to visually relocate applications and redirect input among myriad devices in an interactive workspace. While we previously claimed that ARIS is more effective than other interfaces for performing these tasks, this work seeks to empirically validate our claim. We compared the use of ARIS to an interaction design of a text-based and virtual paths interface for relocating applications and redirecting input in an interactive workspace. Results show that (i) users can relocate applications and redirect input faster with ARIS than a text-based interface, (ii) users commit fewer errors with ARIS than a text-based interface, (iii) users experience less workload and are more satisfied with ARIS than a text-based interface, and (iv) ARIS was comparable to the use of a virtual paths interface. ARIS is more effective than an interaction design that requires a user to mentally map and select textual identifiers, while supporting functionality beyond that of a virtual paths interface