4 research outputs found

    Wisent: Robust Downstream Communication and Storage for Computational RFIDs

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    Computational RFID (CRFID) devices are emerging platforms that can enable perennial computation and sensing by eliminating the need for batteries. Although much research has been devoted to improving upstream (CRFID to RFID reader) communication rates, the opposite direction has so far been neglected, presumably due to the difficulty of guaranteeing fast and error-free transfer amidst frequent power interruptions of CRFID. With growing interest in the market where CRFIDs are forever-embedded in many structures, it is necessary for this void to be filled. Therefore, we propose Wisent-a robust downstream communication protocol for CRFIDs that operates on top of the legacy UHF RFID communication protocol: EPC C1G2. The novelty of Wisent is its ability to adaptively change the frame length sent by the reader, based on the length throttling mechanism, to minimize the transfer times at varying channel conditions. We present an implementation of Wisent for the WISP 5 and an off-the-shelf RFID reader. Our experiments show that Wisent allows transfer up to 16 times faster than a baseline, non-adaptive shortest frame case, i.e. single word length, at sub-meter distance. As a case study, we show how Wisent enables wireless CRFID reprogramming, demonstrating the world's first wirelessly reprogrammable (software defined) CRFID.Comment: Accepted for Publication to IEEE INFOCOM 201

    Hardware module development for RFID drone

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    Nowadays most of the industry or stores uses RFID (Radio Frequency Identification) technology to monitor the state of the product. But, sometimes there is a difference between registered and the real value. In big stores manual inventory is very hard, expensive and time consuming process. In the present decades many researches are going on to avoid the above problem and one of the solutions is to use drones for RFID inventory. This project is focused on designing and developing hardware for RFID drone to aid RFID inventory and development of a software module capable for reading of tags data. The project presents analysis of the hardware devices such as Passive UHF (Ultra High) RFID Reader, Antenna, CPU (Central Processing Unit), PSU (Power Supply Module) and other interfacing components. Selection of the devices is based on criteria such as size and weight, market options and the components which is going to be used for RFID drone. Finally, software coding to read the RFID tags

    Low Power Low Modulation Index Ask Demodulator Design for RFID Applications

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    In the era of the Internet of Things (IoT) there is a tremendous increase in portable wireless devices utilized in our day to day working. One such example is the Radio Frequency Identification tag. The primary challenge in designing passive RFID tags is reliable functionality over extreme temperature and environmental conditions with low power operation. An important component of the RFID tag architecture is the demodulator which is tasked with interpreting the incoming data and extracting the reference clock for the Phase Locked Loop. A novel ASK demodulator architecture that functions across a temperature range of -25? to 125? is designed, analyzed and optimized for the worst and best case semiconductor process variations. The incoming RF frequency is selected as 900MHz based on the EPC GEN2 protocol and the baseband signal is set at 450 KHz with a modulation index of 5%. MOS transistor operation and variability in semiconductor processes is explored and a better understanding of how these concepts effect and shape our design decisions is established. A design objective is setup and steps to achieve these design objectives are presented. The design of the ASK demodulator is completed with the help of the Cadence Virtuoso tool, utilizing the IBM 0.18µm (CMOS 7RF) process. In order to test our design we have used the Monte Carlo analysis and all the significant DC parameters of the design have been tested for 10,000 samples owing to the high variability associated with modern semiconductor processes. On the other hand Monte Carlo simulations for the transient simulations have been done for 30 samples in accordance with the Central Limit Theorem. The results of the design are compared with other ASK RFID demodulator designs in the past and a comparison is made by utilizing a Figure of Merit from literature. The design is among the best ASK demodulator designs found in literature. Throughout this effort there is emphasis on MOS transistor operation and variations in semiconductor processes. The design takes all pertinent challenges such as extreme temperature, environment conditions and the reliability of the design. Through this work an attempt is made to try and simplify the work of the reader and expose them to the challenges associated with ASK demodulator design.Electrical Engineerin
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