Effects of practical impairments on cooperative distributed antennas combined with fractional frequency reuse

Cooperative Multiple Point (CoMP) transmission aided Distributed Antenna Systems (DAS) are proposed for increasing the received Signal-to-Interference-plus-Noise-Ratio (SINR) in the cell-edge area of a cellular system employing Fractional Frequency Reuse (FFR) in the presence of realistic imperfect Channel State Information (CSI) as well as synchronisation errors between the transmitters and the receivers. Our simulation results demonstrate that the CoMP aided DAS scenario is capable of increasing the attainable SINR by up to 3dB in the presence of a wide range of realistic imperfections

Jitter and Decision-level Noise Separation in A/D Converters

Gaussian aperture jitter leads to a reduced SNR of A/D converters. Also other noise sources, faults and nonlinearities affect the digital output signal. A measurement setup for a new off-chip diagnosis method, which systematically separates the jitter-induced errors from the errors caused by these other factors, is described. Deterministic errors are removed via a subtracting technique. High-level ADC simulations and measurements have been carried out to determine relations between the size of the jitter or decision-level noise and the remaining random errors. By carrying out two tests at two different input frequencies and using the simulation results, errors induced by decision-level noise can be remove

Ant colony optimisation-based radiation pattern manipulation algorithm for electronically steerable array radiator antennas

A new algorithm for manipulating the radiation pattern of Electronically Steerable Array Radiator Antennas is proposed. A continuous implementation of the Ant Colony Optimisation (ACO) technique calculates the optimal impedance values of reactances loading different parasitic radiators placed in a circle around a centre antenna. By proposing a method to obtain a suitable sampling frequency of the radiation pattern for use in the optimisation algorithm and by transforming the reactance search space into the search space of associated phases, special care was taken to create a fast and reliable implementation, resulting in an approach that is suitable for real-time implementation. The authors compare their approach to analytical techniques and optimisation algorithms for calculating these reactances. Results show that the method is able to calculate near-optimal solutions for gain optimisation and side lobe reduction

Neural-network-aided automatic modulation classification

Automatic modulation classification (AMC) is a pattern matching problem which significantly impacts divers telecommunication systems, with significant applications in military and civilian contexts alike. Although its appearance in the literature is far from novel, recent developments in machine learning technologies have triggered an increased interest in this area of research. In the first part of this thesis, an AMC system is studied where, in addition to the typical point-to-point setup of one receiver and one transmitter, a second transmitter is also present, which is considered an interfering device. A convolutional neural network (CNN) is used for classification. In addition to studying the effect of interference strength, we propose a modification attempting to leverage some of the debilitating results of interference, and also study the effect of signal quantisation upon classification performance. Consequently, we assess a cooperative setting of AMC, namely one where the receiver features multiple antennas, and receives different versions of the same signal from the single-antenna transmitter. Through the combination of data from different antennas, it is evidenced that this cooperative approach leads to notable performance improvements over the established baseline. Finally, the cooperative scenario is expanded to a more complicated setting, where a realistic geographic distribution of four receiving nodes is modelled, and furthermore, the decision-making mechanism with regard to the identity of a signal resides in a fusion centre independent of the receivers, connected to them over finite-bandwidth backhaul links. In addition to the common concerns over classification accuracy and inference time, data reduction methods of various types (including “trained” lossy compression) are implemented with the objective of minimising the data load placed upon the backhaul links.Open Acces

Fair Coexistence of Scheduled and Random Access Wireless Networks: Unlicensed LTE/WiFi

We study the fair coexistence of scheduled and random access transmitters sharing the same frequency channel. Interest in coexistence is topical due to the need for emerging unlicensed LTE technologies to coexist fairly with WiFi. However, this interest is not confined to LTE/WiFi as coexistence is likely to become increasingly commonplace in IoT networks and beyond 5G. In this article we show that mixing scheduled and random access incurs and inherent throughput/delay cost, the cost of heterogeneity. We derive the joint proportional fair rate allocation, which casts useful light on current LTE/WiFi discussions. We present experimental results on inter-technology detection and consider the impact of imperfect carrier sensing.Comment: 14 pages, 8 figures, journa

Research and developments of distributed video coding

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.The recent developed Distributed Video Coding (DVC) is typically suitable for the applications such as wireless/wired video sensor network, mobile camera etc. where the traditional video coding standard is not feasible due to the constrained computation at the encoder. With DVC, the computational burden is moved from encoder to decoder. The compression efficiency is achieved via joint decoding at the decoder. The practical application of DVC is referred to Wyner-Ziv video coding (WZ) where the side information is available at the decoder to perform joint decoding. This join decoding inevitably causes a very complex decoder. In current WZ video coding issues, many of them emphasise how to improve the system coding performance but neglect the huge complexity caused at the decoder. The complexity of the decoder has direct influence to the system output. The beginning period of this research targets to optimise the decoder in pixel domain WZ video coding (PDWZ), while still achieves similar compression performance. More specifically, four issues are raised to optimise the input block size, the side information generation, the side information refinement process and the feedback channel respectively. The transform domain WZ video coding (TDWZ) has distinct superior performance to the normal PDWZ due to the exploitation in spatial direction during the encoding. However, since there is no motion estimation at the encoder in WZ video coding, the temporal correlation is not exploited at all at the encoder in all current WZ video coding issues. In the middle period of this research, the 3D DCT is adopted in the TDWZ to remove redundancy in both spatial and temporal direction thus to provide even higher coding performance. In the next step of this research, the performance of transform domain Distributed Multiview Video Coding (DMVC) is also investigated. Particularly, three types transform domain DMVC frameworks which are transform domain DMVC using TDWZ based 2D DCT, transform domain DMVC using TDWZ based on 3D DCT and transform domain residual DMVC using TDWZ based on 3D DCT are investigated respectively. One of the important applications of WZ coding principle is error-resilience. There have been several attempts to apply WZ error-resilient coding for current video coding standard e.g. H.264/AVC or MEPG 2. The final stage of this research is the design of WZ error-resilient scheme for wavelet based video codec. To balance the trade-off between error resilience ability and bandwidth consumption, the proposed scheme emphasises the protection of the Region of Interest (ROI) area. The efficiency of bandwidth utilisation is achieved by mutual efforts of WZ coding and sacrificing the quality of unimportant area. In summary, this research work contributed to achieves several advances in WZ video coding. First of all, it is targeting to build an efficient PDWZ with optimised decoder. Secondly, it aims to build an advanced TDWZ based on 3D DCT, which then is applied into multiview video coding to realise advanced transform domain DMVC. Finally, it aims to design an efficient error-resilient scheme for wavelet video codec, with which the trade-off between bandwidth consumption and error-resilience can be better balanced

Optimising algorithm and hardware for deep neural networks on FPGAs

This thesis proposes novel algorithm and hardware optimisation approaches to accelerate Deep Neural Networks (DNNs), including both Convolutional Neural Networks (CNNs) and Bayesian Neural Networks (BayesNNs). The first contribution of this thesis is to propose an adaptable and reconfigurable hardware design to accelerate CNNs. By analysing the computational patterns of different CNNs, a unified hardware architecture is proposed for both 2-Dimension and 3-Dimension CNNs. The accelerator is also designed with runtime adaptability, which adopts different parallelism strategies for different convolutional layers at runtime. The second contribution of this thesis is to propose a novel neural network architecture and hardware design co-optimisation approach, which improves the performance of CNNs at both algorithm and hardware levels. Our proposed three-phase co-design framework decouples network training from design space exploration, which significantly reduces the time-cost of the co-optimisation process. The third contribution of this thesis is to propose an algorithmic and hardware co-optimisation framework for accelerating BayesNNs. At the algorithmic level, three categories of structured sparsity are explored to reduce the computational complexity of BayesNNs. At the hardware level, we propose a novel hardware architecture with the aim of exploiting the structured sparsity for BayesNNs. Both algorithmic and hardware optimisations are jointly applied to push the performance limit.Open Acces