4 research outputs found
Analysis and synthesis of communication protocols and systems
Includes GIT-ICS report no. 85/32Issued as Quarterly progress reports [nos. 1-5], and Final report, Project no. G-36-62
Models of computation and algorithms
Issued as Proposal and Final report, Project no. G-36-65
Generalized Fair Reachability Analysis for Cyclic Protocols
In this paper, the notion of fair reachability is generalized to
cyclic protocols with machines. Substantial state reduction can
be achieved via fair progress state exploration. It is shown that the fair
reachable state space is exactly the set of reachable states with equal
channel length. As a result, deadlock detection is decidable for , the class of cyclic protocols whose fair reachable state spaces are
finite. The concept of simultaneous unboundedness is defined and the lack
of it is shown to be a necessary and sufficient condition for a protocol
to be in . Through finite extension of the fair reachable state
space, it is also shown that detection of unspecified receptions,
unboundedness, and nonexecutable transitions are all decidable for . Furthermore, it is shown that any protocol is logically
correct if and only if there is no logical error in its fair reachable
state space. This study shows that for the class , our
generalized fair reachability analysis technique not only achieves
substantial state reduction but also maintains very competitive logical
error coverage. Therefore, it is a very useful technique to prove logical
correctness for a wide variety of cyclic protocols