5,143 research outputs found

    Cascading Failures in Power Grids - Analysis and Algorithms

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    This paper focuses on cascading line failures in the transmission system of the power grid. Recent large-scale power outages demonstrated the limitations of percolation- and epid- emic-based tools in modeling cascades. Hence, we study cascades by using computational tools and a linearized power flow model. We first obtain results regarding the Moore-Penrose pseudo-inverse of the power grid admittance matrix. Based on these results, we study the impact of a single line failure on the flows on other lines. We also illustrate via simulation the impact of the distance and resistance distance on the flow increase following a failure, and discuss the difference from the epidemic models. We then study the cascade properties, considering metrics such as the distance between failures and the fraction of demand (load) satisfied after the cascade (yield). We use the pseudo-inverse of admittance matrix to develop an efficient algorithm to identify the cascading failure evolution, which can be a building block for cascade mitigation. Finally, we show that finding the set of lines whose removal has the most significant impact (under various metrics) is NP-Hard and introduce a simple heuristic for the minimum yield problem. Overall, the results demonstrate that using the resistance distance and the pseudo-inverse of admittance matrix provides important insights and can support the development of efficient algorithms

    H-Infinity Optimal Interconnections

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    In this paper, a general ℋ∞ problem for continuous time, linear time invariant systems is formulated and solved in a behavioral framework. This general formulation, which includes standard ℋ∞ optimization as a special case, provides added freedom in the design of sub-optimal compensators, and can in fact be viewed as a means of designing optimal systems. In particular, the formulation presented allows for singular interconnections, which naturally occur when interconnecting first principles models

    Comprehensive and modular stochastic modeling framework for the variability-aware assessment of Signal Integrity in high-speed links

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    This paper presents a comprehensive and modular modeling framework for stochastic signal integrity analysis of complex high-speed links. Such systems are typically composed of passive linear networks and nonlinear, usually active, devices. The key idea of the proposed contribution is to express the signals at the ports of each of such system elements or subnetworks as a polynomial chaos expansion. This allows one to compute, for each block, equivalent deterministic models describing the stochastic variations of the network voltages and currents. Such models are synthesized into SPICE-compatible circuit equivalents, which are readily connected together and simulated in standard circuit simulators. Only a single circuit simulation of such an equivalent network is required to compute the pertinent statistical information of the entire system, without the need of running a large number of time-consuming electromagnetic circuit co-simulations. The accuracy and efficiency of the proposed approach, which is applicable to a large class of complex circuits, are verified by performing signal integrity investigations of two interconnect examples

    Frequency- and time-domain stochastic analysis of lossy and dispersive interconnects in a SPICE-like environment

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    This paper presents an improvement of the state-of-the-art polynomial chaos (PC) modeling of high-speed interconnects with parameter uncertainties via SPICE-like tools. While the previous model, due to its mathematical formulation, was limited to lossless lines, the introduction of modified classes of polynomials yields a formulation that allows to account for lossess and dispersion as well. Thanks to this, the new implementation can also take full advantage of the combination of the PC technique with macromodels that accurately describe the interconnect properties. An application example, i.e. the stochastic analysis of an on-chip line, validates and demonstrates the improved method
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