Congestion control for transmission control protocol (TCP) over asynchronous transfer mode (ATM) networks

Performance of Transmission Control Protocol (TCP) connections in high-speed Asynchronous Transfer Model (ATM) networks is of great importance due to the widespread use of the TCP/IP protocol for data transfers and the increasing deployment of ATM networks. When TCP runs on top of ATM network, the TCP window based and ATM rate based congestion control mechanisms interact with each other. TCP performance may be degraded by the mismatch between the two mechanisms. We study the TCP performance over ATM networks with Unspecified Bit Rate (UBR) service and Available Bit Rate (ABR) service under various congestion control mechanisms by using simulation techniques, and propose a novel congestion control algorith, "Fair Intelligent Congestion Control", which significantly enhances the congestion control efficiency and improves the TCP performance over ATM networks

A simulation study on congestion control for the ATM ABR service

Ankara : Department of Electrical and Electronics Engineering and the Institute of Engineering and Sciences of Bilkent University, 1997.Thesis (Master's) -- Bilkent University, 1997.Includes bibliographical references leaves 75-78.Ülkü, SezerM.S

Satellite Networks: Architectures, Applications, and Technologies

Since global satellite networks are moving to the forefront in enhancing the national and global information infrastructures due to communication satellites' unique networking characteristics, a workshop was organized to assess the progress made to date and chart the future. This workshop provided the forum to assess the current state-of-the-art, identify key issues, and highlight the emerging trends in the next-generation architectures, data protocol development, communication interoperability, and applications. Presentations on overview, state-of-the-art in research, development, deployment and applications and future trends on satellite networks are assembled

Supporting real time video over ATM networks

Includes bibliographical references.In this project, we propose and evaluate an approach to delimit and tag such independent video slice at the ATM layer for early discard. This involves the use of a tag cell differentiated from the rest of the data by its PTI value and a modified tag switch to facilitate the selective discarding of affected cells within each video slice as opposed to dropping of cells at random from multiple video frames

IP and ATM integration: A New paradigm in multi-service internetworking

ATM is a widespread technology adopted by many to support advanced data communication, in particular efficient Internet services provision. The expected challenges of multimedia communication together with the increasing massive utilization of IP-based applications urgently require redesign of networking solutions in terms of both new functionalities and enhanced performance. However, the networking context is affected by so many changes, and to some extent chaotic growth, that any approach based on a structured and complex top-down architecture is unlikely to be applicable. Instead, an approach based on finding out the best match between realistic service requirements and the pragmatic, intelligent use of technical opportunities made available by the product market seems more appropriate. By following this approach, innovations and improvements can be introduced at different times, not necessarily complying with each other according to a coherent overall design. With the aim of pursuing feasible innovations in the different networking aspects, we look at both IP and ATM internetworking in order to investigating a few of the most crucial topics/ issues related to the IP and ATM integration perspective. This research would also address various means of internetworking the Internet Protocol (IP) and Asynchronous Transfer Mode (ATM) with an objective of identifying the best possible means of delivering Quality of Service (QoS) requirements for multi-service applications, exploiting the meritorious features that IP and ATM have to offer. Although IP and ATM often have been viewed as competitors, their complementary strengths and limitations from a natural alliance that combines the best aspects of both the technologies. For instance, one limitation of ATM networks has been the relatively large gap between the speed of the network paths and the control operations needed to configure those data paths to meet changing user needs. IP\u27s greatest strength, on the other hand, is the inherent flexibility and its capacity to adapt rapidly to changing conditions. These complementary strengths and limitations make it natural to combine IP with ATM to obtain the best that each has to offer. Over time many models and architectures have evolved for IP/ATM internetworking and they have impacted the fundamental thinking in internetworking IP and ATM. These technologies, architectures, models and implementations will be reviewed in greater detail in addressing possible issues in integrating these architectures s in a multi-service, enterprise network. The objective being to make recommendations as to the best means of interworking the two in exploiting the salient features of one another to provide a faster, reliable, scalable, robust, QoS aware network in the most economical manner. How IP will be carried over ATM when a commercial worldwide ATM network is deployed is not addressed and the details of such a network still remain in a state of flux to specify anything concrete. Our research findings culminated with a strong recommendation that the best model to adopt, in light of the impending integrated service requirements of future multi-service environments, is an ATM core with IP at the edges to realize the best of both technologies in delivering QoS guarantees in a seamless manner to any node in the enterprise

ATM-kytkinpiirisarja liityntäsolmussa

Tämän diplomityön tarkoituksena oli tutkia kuinka kaupallinen ATM-kytkinpiirisarja saadaan sovitettua osaksi ATM-verkon liityntäsolmun arkkitehtuuria sekä rakentaa evaluointisysteemi yhden tällaisen arkkitehtuurin testaamiseksi. Tässä diplomityössä liityntäsolmu on määritelty verkkoelementiksi, joka yhdistää loppukäyttäjät verkkoon. Se kerää dataa, mitä tahansa digitaalista dataa, käyttäjiltä ja välittää sen verkkoon. Se voi myös toimia ATM-kytkin tai ATM-ristikytkentäelementtinä. Tämä tarkoittaa sitä, että liityntöjä verkkoon voi olla useampia kuin yksi ja liityntäsolmu pystyy kytkemään dataa niiden välillä samaan tapaan kuin käyttäjäliityntöjen välilläkin. Käyttäjäliitynnät voivat olla esimerkiksi johonkin DSL-tekniikkaan perustuvia liityntöjä, E1/T1-liityntöjä tai POTS-liityntöjä. Eräs mahdollisuus liityntäsolmun arkkitehtuurin toteuttamiseksi on käyttää kaupallista kytkinpiirisarjaa. Markkinoilla on monia vaihtoehtoja tähän tarkoitukseen. Tässä diplomityössä on vertailututkimus kolmen eri kytkinpiirisarjan sopivuudesta tähän tarkoitukseen. IDT SWITCHStAR[TM ] kytkinpiirisarjaan tutustutaan lähemmin suunnittelemalla ja rakentamalle sille erityinen evaluointisysteemi. Tässä diplomityössä käytetty liityntäsolmu ei omaa kytkentätoimintoa vielä, joten sitä voidaan käyttää ainoastaan keskittimenä. Koska ATM-verkkojen tulevaisuuden arkkitehtuuri ei ole kovin selvä, ATM-kytkinpiirisarjan käyttö ainakin mahdollistaa tämän toiminnon suhteellisen helpon lisäämisen, jos tarve vaatii. Alkuosa tästä diplomityöstä käsittelee ATM:n peruskäsitteitä, ATM-verkkoja sekä kytkemistä ATM-verkoissa. Sen jälkeen on vertailututkimus kolmen eri kytkinpiirisarjan soveltumisesta käytettäväksi liityntäsolmussa. Loppuosa käsittelee evaluointisysteemin suunnittelua ja rakentamista IDT SWITCHStAR[TM ] kytkinpiirisarjalle. Aivan lopussa on vielä kommentteja ja johtopäätöksiä tämän diplomityön kulusta ja tuloksista sekä ehdotelma siitä kuinka IDT:n kytkinpiirisarjaa voitaisiin käyttää osana liityntäsolmua

Novel techniques in large scaleable ATM switches

Bibliography: p. 172-178.This dissertation explores the research area of large scale ATM switches. The requirements for an ATM switch are determined by overviewing the ATM network architecture. These requirements lead to the discussion of an abstract ATM switch which illustrates the components of an ATM switch that automatically scale with increasing switch size (the Input Modules and Output Modules) and those that do not (the Connection Admission Control and Switch Management systems as well as the Cell Switch Fabric). An architecture is suggested which may result in a scalable Switch Management and Connection Admission Control function. However, the main thrust of the dissertation is confined to the cell switch fabric. The fundamental mathematical limits of ATM switches and buffer placement is presented next emphasising the desirability of output buffering. This is followed by an overview of the possible routing strategies in a multi-stage interconnection network. A variety of space division switches are then considered which leads to a discussion of the hypercube fabric, (a novel switching technique). The hypercube fabric achieves good performance with an O(N.log₂N)²) scaling. The output module, resequencing, cell scheduling and output buffering technique is presented leading to a complete description of the proposed ATM switch. Various traffic models are used to quantify the switch's performance. These include a simple exponential inter-arrival time model, a locality of reference model and a self-similar, bursty, multiplexed Variable Bit Rate (VBR) model. FIFO queueing is simple to implement in an ATNI switch, however, more responsive queueing strategies can result in an improved performance. An associative memory is presented which allows the separate queues in the ATM switch to be effectively logically combined into a single FIFO queue. The associative memory is described in detail and its feasibility is shown by laying out the Integrated Circuit masks and performing an analogue simulation of the IC's performance is SPICE3. Although optimisations were required to the original design, the feasibility of the approach is shown with a 15Ƞs write time and a 160Ƞs read time for a 32 row, 8 priority bit, 10 routing bit version of the memory. This is achieved with 2µm technology, more advanced technologies may result in even better performance. The various traffic models and switch models are simulated in a number of runs. This shows the performance of the hypercube which outperforms a Clos network of equivalent technology and approaches the performance of an ideal reference fabric. The associative memory leverages a significant performance advantage in the hypercube network and a modest advantage in the Clos network. The performance of the switches is shown to degrade with increasing traffic density, increasing locality of reference, increasing variance in the cell rate and increasing burst length. Interestingly, the fabrics show no real degradation in response to increasing self similarity in the fabric. Lastly, the appendices present suggestions on how redundancy, reliability and multicasting can be achieved in the hypercube fabric. An overview of integrated circuits is provided. A brief description of commercial ATM switching products is given. Lastly, a road map to the simulation code is provided in the form of descriptions of the functionality found in all of the files within the source tree. This is intended to provide the starting ground for anyone wishing to modify or extend the simulation system developed for this thesis

Design and analysis of flow control algorithms for data networks

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997.Includes bibliographical references (leaves 110-112).by Paolo L. Naváez Guarnieri.M.S