Printed Circuit Board (PCB) design process and fabrication

This module describes main characteristics of Printed Circuit Boards (PCBs). A brief history of PCBs is introduced in the first chapter. Then, the design processes and the fabrication of PCBs are addressed and finally a study case is presented in the last chapter of the module.Peer ReviewedPostprint (published version

The Integration of Process Planning and Shop Floor Scheduling in Small Batch Part Manufacturing

In this paper we explore possibilities to cut manufacturing leadtimes and to improve delivery performance in a small batch part manufacturing shop by integrating process planning and shop floor scheduling. Using a set of initial process plans (one for each order in the shop), we exploit a resource decomposition procedure to determine schedules to determine schedules which minimize the maximum lateness, given these process plans. If the resulting schedule is still unsatisfactory, a critical path analysis is performed to select jobs as candidates for alternative process plans. In this way, an excellent due date performance can be achieved, with a minimum of process planning and scheduling effort

FirstLight: Pluggable Optical Interconnect Technologies for Polymeric Electro-Optical Printed Circuit Boards in Data Centers

The protocol data rate governing data storage devices will increase to over 12 Gb/s by 2013 thereby imposing unmanageable cost and performance burdens on future digital data storage systems. The resulting performance bottleneck can be substantially reduced by conveying high-speed data optically instead of electronically. A novel active pluggable 82.5 Gb/s aggregate bit rate optical connector technology, the design and fabrication of a compact electro-optical printed circuit board to meet exacting specifications, and a method for low cost, high precision, passive optical assembly are presented. A demonstration platform was constructed to assess the viability of embedded electro-optical midplane technology in such systems including the first ever demonstration of a pluggable active optical waveguide printed circuit board connector. High-speed optical data transfer at 10.3125 Gb/s was demonstrated through a complex polymer waveguide interconnect layer embedded into a 262 mm × 240 mm × 4.3 mm electro-optical midplane. Bit error rates of less than 10-12 and optical losses as low as 6 dB were demonstrated through nine multimode polymer wave guides with an aggregate data bandwidth of 92.8125 Gb/s

Capacity Planning and Leadtime management

In this paper we discuss a framework for capacity planning and lead time management in manufacturing companies, with an emphasis on the machine shop. First we show how queueing models can be used to find approximations of the mean and the variance of manufacturing shop lead times. These quantities often serve as a basis to set a fixed planned lead time in an MRP-controlled environment. A major drawback of a fixed planned lead time is the ignorance of the correlation between actual work loads and the lead times that can be realized under a limited capacity flexibility. To overcome this problem, we develop a method that determines the earliest possible completion time of any arriving job, without sacrificing the delivery performance of any other job in the shop. This earliest completion time is then taken to be the delivery date and thereby determines a workload-dependent planned lead time. We compare this capacity planning procedure with a fixed planned lead time approach (as in MRP), with a procedure in which lead times are estimated based on the amount of work in the shop, and with a workload-oriented release procedure. Numerical experiments so far show an excellent performance of the capacity planning procedure

Automatic synthesis of analog layout : a survey

A review of recent research in the automatic synthesis of physical geometry for analog integrated circuits is presented. On introduction, an explanation of the difficulties involved in analog layout as opposed to digital layout is covered. Review of the literature then follows. Emphasis is placed on the exposition of general methods for addressing problems specific to analog layout, with the details of specific systems only being given when they surve to illustrate these methods well. The conclusion discusses problems remaining and offers a prediction as to how technology will evolve to solve them. It is argued that although progress has been and will continue to be made in the automation of analog IC layout, due to fundamental differences in the nature of analog IC design as opposed to digital design, it should not be expected that the level of automation of the former will reach that of the latter any time soon

Directed Placement for mVLSI Devices

Continuous-flow microfluidic devices based on integrated channel networks are becoming increasingly prevalent in research in the biological sciences. At present, these devices are physically laid out by hand by domain experts who understand both the underlying technology and the biological functions that will execute on fabricated devices. The lack of a design science that is specific to microfluidic technology creates a substantial barrier to entry. To address this concern, this article introduces Directed Placement, a physical design algorithm that leverages the natural "directedness" in most modern microfluidic designs: fluid enters at designated inputs, flows through a linear or tree-based network of channels and fluidic components, and exits the device at dedicated outputs. Directed placement creates physical layouts that share many principle similarities to those created by domain experts. Directed placement allows components to be placed closer to their neighbors compared to existing layout algorithms based on planar graph embedding or simulated annealing, leading to an average reduction in laid-out fluid channel length of 91% while improving area utilization by 8% on average. Directed placement is compatible with both passive and active microfluidic devices and is compatible with a variety of mainstream manufacturing technologies

Management and Service-aware Networking Architectures (MANA) for Future Internet Position Paper: System Functions, Capabilities and Requirements

Future Internet (FI) research and development threads have recently been gaining momentum all over the world and as such the international race to create a new generation Internet is in full swing: GENI, Asia Future Internet, Future Internet Forum Korea, European Union Future Internet Assembly (FIA). This is a position paper identifying the research orientation with a time horizon of 10 years, together with the key challenges for the capabilities in the Management and Service-aware Networking Architectures (MANA) part of the Future Internet (FI) allowing for parallel and federated Internet(s)