5 research outputs found
Compact Floor-Planning via Orderly Spanning Trees
Floor-planning is a fundamental step in VLSI chip design. Based upon the
concept of orderly spanning trees, we present a simple O(n)-time algorithm to
construct a floor-plan for any n-node plane triangulation. In comparison with
previous floor-planning algorithms in the literature, our solution is not only
simpler in the algorithm itself, but also produces floor-plans which require
fewer module types. An equally important aspect of our new algorithm lies in
its ability to fit the floor-plan area in a rectangle of size (n-1)x(2n+1)/3.
Lower bounds on the worst-case area for floor-planning any plane triangulation
are also provided in the paper.Comment: 13 pages, 5 figures, An early version of this work was presented at
9th International Symposium on Graph Drawing (GD 2001), Vienna, Austria,
September 2001. Accepted to Journal of Algorithms, 200
Orthogonal Drawings based on the Stratification of Planar Graphs
International audienc
Orthogonal Drawings based on the Stratification of Planar Graphs
International audienc