629 research outputs found
On algorithmic rate-coded AER generation
This paper addresses the problem of converting a conventional video stream based on sequences of frames into the spike event-based representation known as the address-event-representation (AER). In this paper we concentrate on rate-coded AER. The problem is addressed as an algorithmic problem, in which different methods are proposed, implemented and tested through software algorithms. The proposed algorithms are comparatively evaluated according to different criteria. Emphasis is put on the potential of such algorithms for a) doing the frame-based to event-based representation in real time, and b) that the resulting event streams ressemble as much as possible those generated naturally by rate-coded address-event VLSI chips, such as silicon AER retinae. It is found that simple and straightforward algorithms tend to have high potential for real time but produce event distributions that differ considerably from those obtained in AER VLSI chips. On the other hand, sophisticated algorithms that yield better event distributions are not efficient for real time operations. The methods based on linear-feedback-shift-register (LFSR) pseudorandom number generation is a good compromise, which is feasible for real time and yield reasonably well distributed events in time. Our software experiments, on a 1.6-GHz Pentium IV, show that at 50% AER bus load the proposed algorithms require between 0.011 and 1.14 ms per 8 bit-pixel per frame. One of the proposed LFSR methods is implemented in real time hardware using a prototyping board that includes a VirtexE 300 FPGA. The demonstration hardware is capable of transforming frames of 64 times; 64 pixels of 8-bit depth at a frame rate of 25 frames per second, producing spike events at a peak rate of 107 events per second.European Union IST-2001-34124Gobierno de España TIC-2000-0406-P4, TIC-2003-08164-C03-0
AER-based robotic closed-loop control system
Address-Event-Representation (AER) is an
asynchronous protocol for transferring the information of
spiking neuro-inspired systems. Actually AER systems are able
to see, to ear, to process information, and to learn. Regarding to
the actuation step, the AER has been used for implementing
Central Pattern Generator algorithms, but not for controlling
the actuators in a closed-loop spike-based way. In this paper we
analyze an AER based model for a real-time neuro-inspired
closed-loop control system. We demonstrate it into a differential
control system for a two-wheel vehicle using feedback AER
information. PFM modulation has been used to power the DC
motors of the vehicle and translation into AER of encoder
information is also presented for the close-loop. A codesign
platform (called AER-Robot), based into a Xilinx Spartan 3
FPGA and an 8051 USB microcontroller, with power stages for
four DC motors has been used for the demonstrator.Junta de Andalucía P06-TIC-01417Ministerio de Educación y Ciencia TEC2006-11730-C03-0
An AER-Based Actuator Interface for Controlling an Anthropomorphic Robotic Hand
Bio-Inspired and Neuro-Inspired systems or circuits are a
relatively novel approaches to solve real problems by mimicking the biology
in its efficient solutions. Robotic also tries to mimic the biology and
more particularly the human body structure and efficiency of the muscles,
bones, articulations, etc. Address-Event-Representation (AER) is
a communication protocol for transferring asynchronous events between
VLSI chips, originally developed for neuro-inspired processing systems
(for example, image processing). Such systems may consist of a complicated
hierarchical structure with many chips that transmit data among
them in real time, while performing some processing (for example, convolutions).
The information transmitted is a sequence of spikes coded using
high speed digital buses. These multi-layer and multi-chip AER systems
perform actually not only image processing, but also audio processing,
filtering, learning, locomotion, etc. This paper present an AER interface
for controlling an anthropomorphic robotic hand with a neuro-inspired
system.Unión Europea IST-2001-34124 (CAVIAR)Ministerio de Ciencia y Tecnología TIC-2003-08164-C03-0
AER Auditory Filtering and CPG for Robot Control
Address-Event-Representation (AER) is a
communication protocol for transferring asynchronous events
between VLSI chips, originally developed for bio-inspired
processing systems (for example, image processing). The event
information in an AER system is transferred using a highspeed
digital parallel bus. This paper presents an experiment
using AER for sensing, processing and finally actuating a
Robot. The AER output of a silicon cochlea is processed by an
AER filter implemented on a FPGA to produce rhythmic
walking in a humanoid robot (Redbot). We have implemented
both the AER rhythm detector and the Central Pattern
Generator (CPG) on a Spartan II FPGA which is part of a
USB-AER platform developed by some of the authors.Commission of the European Communities IST-2001-34124 (CAVIAR)Comisión Interministerial de Ciencia y Tecnología TIC-2003-08164-C03-0
From Vision Sensor to Actuators, Spike Based Robot Control through Address-Event-Representation
One field of the neuroscience is the neuroinformatic whose aim is to
develop auto-reconfigurable systems that mimic the human body and brain. In
this paper we present a neuro-inspired spike based mobile robot. From
commercial cheap vision sensors converted into spike information, through
spike filtering for object recognition, to spike based motor control models. A
two wheel mobile robot powered by DC motors can be autonomously
controlled to follow a line drown in the floor. This spike system has been
developed around the well-known Address-Event-Representation mechanism to
communicate the different neuro-inspired layers of the system. RTC lab has
developed all the components presented in this work, from the vision sensor, to
the robot platform and the FPGA based platforms for AER processing.Ministerio de Ciencia e Innovación TEC2006-11730-C03-02Junta de Andalucía P06-TIC-0141
Visual Spike-based Convolution Processing with a Cellular Automata Architecture
this paper presents a first approach for
implementations which fuse the Address-Event-Representation
(AER) processing with the Cellular Automata using FPGA and
AER-tools. This new strategy applies spike-based convolution
filters inspired by Cellular Automata for AER vision
processing. Spike-based systems are neuro-inspired circuits
implementations traditionally used for sensory systems or
sensor signal processing. AER is a neuromorphic
communication protocol for transferring asynchronous events
between VLSI spike-based chips. These neuro-inspired
implementations allow developing complex, multilayer,
multichip neuromorphic systems and have been used to design
sensor chips, such as retinas and cochlea, processing chips, e.g.
filters, and learning chips. Furthermore, Cellular Automata is a
bio-inspired processing model for problem solving. This
approach divides the processing synchronous cells which
change their states at the same time in order to get the solution.Ministerio de Educación y Ciencia TEC2006-11730-C03-02Ministerio de Ciencia e Innovación TEC2009-10639-C04-02Junta de Andalucía P06-TIC-0141
AER tools for Communications and Debugging
Address-event-representation (AER) is a communications protocol for transferring spikes between bio-inspired chips. Such systems may consist of a hierarchical structure with several chips that transmit spikes among them in real time, while performing some processing. To develop and test AER based systems it is convenient to have a set of instruments that would allow to: generate AER streams, monitor the output produced by neural chips and modify the spike stream produced by an emitting chip to adapt it to the requirements of the receiving elements. In this paper we present a set of tools that implement these functions developed in the CAVIAR EU projectUnión Europea IST-2001-34124 (CAVIAR)Ministerio de Ciencia y Tecnología TIC-2003-08164-C03-0
Spike Processing on an Embedded Multi-task Computer: Image Reconstruction
There is an emerging philosophy, called Neuro-informatics, contained
in the Artificial Intelligence field, that aims to emulate how living beings do tasks
such as taking a decision based on the interpretation of an image by emulating spiking
neurons into VLSI designs and, therefore, trying to re-create the human brain at
its highest level. Address-Event-Representation (AER) is a communication protocol
that has embedded part of the processing. It is intended to transfer spikes between
bioinspired chips. An AER based system may consist of a hierarchical structure with
several chips that transmit spikes among them in real-time, while performing some
processing. There are several AER tools to help to develop and test AER based systems.
These tools require the use of a computer to allow the higher level processing of
the event information, reaching very high bandwidth at the AER communication level.
We propose the use of an embedded platform based on a multi-task operating system
to allow both, the AER communication and processing without the requirement of either
a laptop or a computer. In this paper, we present and study the performance of a
new philosophy of a frame-grabber AER tool based on a multi-task environment. This
embedded platform is based on the Intel XScale processor which is governed by an
embedded GNU/Linux system. We have connected and programmed it for processing
Address-Event information from a spiking generator.Ministerio de Educación y Ciencia TEC2006-11730-C03-0
Embedding Multi-Task Address-Event- Representation Computation
Address-Event-Representation, AER, is a communication protocol that is
intended to transfer neuronal spikes between bioinspired chips. There are
several AER tools to help to develop and test AER based systems, which may
consist of a hierarchical structure with several chips that transmit spikes
among them in real-time, while performing some processing. Although these
tools reach very high bandwidth at the AER communication level, they require
the use of a personal computer to allow the higher level processing of the
event information. We propose the use of an embedded platform based on a
multi-task operating system to allow both, the AER communication and
processing without the requirement of either a laptop or a computer. In this
paper, we present and study the performance of an embedded multi-task AER
tool, connecting and programming it for processing Address-Event
information from a spiking generator.Ministerio de Ciencia e Innovación TEC2006-11730-C03-0
On the AER Convolution Processors for FPGA
Image convolution operations in digital computer
systems are usually very expensive operations in terms of
resource consumption (processor resources and processing time)
for an efficient Real-Time application. In these scenarios the
visual information is divided into frames and each one has to be
completely processed before the next frame arrives in order to
warranty the real-time. A spike-based philosophy for computing
convolutions based on the neuro-inspired Address-Event-
Representation (AER) is achieving high performances. In this
paper we present two FPGA implementations of AER-based
convolution processors for relatively small Xilinx FPGAs
(Spartan-II 200 and Spartan-3 400), which process 64x64 images
with 11x11 convolution kernels. The maximum equivalent
operation rate that can be reached is 163.51 MOPS for 11x11
kernels, in a Xilinx Spartan 3 400 FPGA with a 50MHz clock.
Formulations, hardware architecture, operation examples and
performance comparison with frame-based convolution
processors are presented and discussed.Ministerio de Ciencia e Innovación TEC2006-11730-C03-02Ministerio de Ciencia e Innovación TEC2009-10639-C04-02Junta de Andalucía P06-TIC-0141
- …