LOT: Logic Optimization with Testability - new transformations for logic synthesis

A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random pattern testability. The method is based on structural transformations at the gate level. New transformations involving EX-OR gates as well as Reed–Muller expansions have been introduced in the synthesis of multilevel circuits. This method is augmented with transformations that specifically enhance random-pattern testability while reducing the area. Testability enhancement is an integral part of our synthesis methodology. Experimental results show that the proposed methodology not only can achieve lower area than other similar tools, but that it achieves better testability compared to available testability enhancement tools such as tstfx. Specifically for ISCAS-85 benchmark circuits, it was observed that EX-OR gate-based transformations successfully contributed toward generating smaller circuits compared to other state-of-the-art logic optimization tools

Plug & Test at System Level via Testable TLM Primitives

With the evolution of Electronic System Level (ESL) design methodologies, we are experiencing an extensive use of Transaction-Level Modeling (TLM). TLM is a high-level approach to modeling digital systems where details of the communication among modules are separated from the those of the implementation of functional units. This paper represents a first step toward the automatic insertion of testing capabilities at the transaction level by definition of testable TLM primitives. The use of testable TLM primitives should help designers to easily get testable transaction level descriptions implementing what we call a "Plug & Test" design methodology. The proposed approach is intended to work both with hardware and software implementations. In particular, in this paper we will focus on the design of a testable FIFO communication channel to show how designers are given the freedom of trading-off complexity, testability levels, and cos

Design for testability of high-order OTA-C filters

Copyright © 2016 John Wiley & Sons, Ltd.A study of oscillation-based test for high-order Operational Transconductance Amplifier-C (OTA-C) filters is presented. The method is based on partition of a high-order filter into second-order filter functions. The opening Q-loop and adding positive feedback techniques are developed to convert the second-order filter section into a quadrature oscillator. These techniques are based on an open-loop configuration and an additional positive feedback configuration. Implementation of the two testability design methods for nth-order cascade, IFLF and leapfrog (LF) filters is presented, and the area overhead of the modified circuits is also discussed. The performances of the presented techniques are investigated. Fourth-order cascade, inverse follow-the-leader feedback (IFLF) and LF OTA-C filters were designed and simulated for analysis of fault coverage using the adding positive feedback method based on an analogue multiplexer. Simulation results show that the oscillation-based test method using positive feedback provides high fault coverage of around 97%, 96% and 95% for the cascade, IFLF and LF OTA-C filters, respectively. Copyright ÂPeer reviewe

Oscillation-based Test Method for Continuous-time OTA-C Filters

“This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder." “Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.”Design for testability technique using oscillation-based test topology for KHN OTA-C filters is proposed. The oscillation-based test structure is a vectorless output test strategy easily extendable to built-in self-test. During test mode, the filter under test is converted into an oscillator by establishing the oscillation condition in its transfer function. The oscillator frequency can be measured using digital circuitry and deviations from the cut-off frequency indicate the faulty behaviour of the filter. The proposed method is suitable for both catastrophic and parametric fault diagnosis as well as effective in detecting single and multiple faults. The validity of the proposed method has been verified using comparison between faulty and fault-free simulation results of KHN OTA-C filter. Simulation results in 0.25mum CMOS technology show that the proposed oscillation-based test strategy has 84% fault coverage and with a minimum number of extra components, requires a negligible area overhead.Final Published versio

Oscillation-Based Test Structure and Method for OTA-C Filters

“This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder." “Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.”This paper describes a design for testability technique for operational transconductance amplifier and capacitor filters using an oscillation-based test topology. The oscillation-based test structure is a vectorless output test strategy easily extendable to built-in self-test. The proposed methodology converts filter under test into a quadrature oscillator using very simple techniques and measures the output frequency. The oscillation frequency may be considered as a digital signal and it can be evaluated using digital circuitry therefore the test time is very small. These characteristics imply that the proposed method is very suitable for catastrophic and parametric faults testing and also effective in detecting single and multiple faults. The validity of the proposed method has been verified using comparison between faulty and fault-free simulation results of two integrator loop and Tow-Thomas filters. Simulation results in 0.25 mum CMOS technology show that the proposed oscillation-based test strategy for OTA-C filters has 87% fault coverage and with a minimum number of extra components, requires a negligible area overhead

An On-line BIST RAM Architecture with Self Repair Capabilities

The emerging field of self-repair computing is expected to have a major impact on deployable systems for space missions and defense applications, where high reliability, availability, and serviceability are needed. In this context, RAM (random access memories) are among the most critical components. This paper proposes a built-in self-repair (BISR) approach for RAM cores. The proposed design, introducing minimal and technology-dependent overheads, can detect and repair a wide range of memory faults including: stuck-at, coupling, and address faults. The test and repair capabilities are used on-line, and are completely transparent to the external user, who can use the memory without any change in the memory-access protocol. Using a fault-injection environment that can emulate the occurrence of faults inside the module, the effectiveness of the proposed architecture in terms of both fault detection and repairing capability was verified. Memories of various sizes have been considered to evaluate the area-overhead introduced by this proposed architectur

MINIMALIST: An Environment for the Synthesis, Verification and Testability of Burst-Mode Asynchronous Machines

MINIMALIST is a new extensible environment for the synthesis and verification of burst-mode asynchronous finite-state machines. MINIMALIST embodies a complete technology-independent synthesis path, with state-of-the-art exact and heuristic asynchronous synthesis algorithms, e.g.optimal state assignment (CHASM), two-level hazard-free logic minimization (HFMIN, ESPRESSO-HF, and IMPYMIN), and synthesis-for-testability. Unlike other asynchronous synthesis packages, MINIMALIST also offers many options:literal vs. product optimization, single- vs. multi-output logic minimization, using vs. not using fed-back outputs as state variables, and exploring varied code lengths during state assignment, thus allowing the designer to explore trade-offs and select the implementation style which best suits the application. MINIMALIST benchmark results demonstrate its ability to produce implementations with an average of 34% and up to 48% less area, and an average of 11% and up to 37% better performance, than the best existing package. Our synthesis-for-testability method guarantees 100% testability under both stuck-at and robust path delay fault models,requiring little or no overhead. MINIMALIST also features both command-line and graphic user interfaces, and supports extension via well-defined interfaces for adding new tools. As such, it is easily augmented to form a complete path to technology-dependent logic

Custom Integrated Circuits

Contains reports on nine research projects.Analog Devices, Inc.International Business Machines CorporationJoint Services Electronics Program Contract DAAL03-89-C-0001U.S. Air Force - Office of Scientific Research Contract AFOSR 86-0164BDuPont CorporationNational Science Foundation Grant MIP 88-14612U.S. Navy - Office of Naval Research Contract N00014-87-K-0825American Telephone and TelegraphDigital Equipment CorporationNational Science Foundation Grant MIP 88-5876

Human brain evolution and the "Neuroevolutionary Time-depth Principle:" Implications for the Reclassification of fear-circuitry-related traits in DSM-V and for studying resilience to warzone-related posttraumatic stress disorder.

The DSM-III, DSM-IV, DSM-IV-TR and ICD-10 have judiciously minimized discussion of etiologies to distance clinical psychiatry from Freudian psychoanalysis. With this goal mostly achieved, discussion of etiological factors should be reintroduced into the Diagnostic and Statistical Manual of Mental Disorders, Fifth Edition (DSM-V). A research agenda for the DSM-V advocated the "development of a pathophysiologically based classification system". The author critically reviews the neuroevolutionary literature on stress-induced and fear circuitry disorders and related amygdala-driven, species-atypical fear behaviors of clinical severity in adult humans. Over 30 empirically testable/falsifiable predictions are presented. It is noted that in DSM-IV-TR and ICD-10, the classification of stress and fear circuitry disorders is neither mode-of-acquisition-based nor brain-evolution-based. For example, snake phobia (innate) and dog phobia (overconsolidational) are clustered together. Similarly, research on blood-injection-injury-type-specific phobia clusters two fears different in their innateness: 1) an arguably ontogenetic memory-trace-overconsolidation-based fear (hospital phobia) and 2) a hardwired (innate) fear of the sight of one's blood or a sharp object penetrating one's skin. Genetic architecture-charting of fear-circuitry-related traits has been challenging. Various, non-phenotype-based architectures can serve as targets for research. In this article, the author will propose one such alternative genetic architecture. This article was inspired by the following: A) Nesse's "Smoke-Detector Principle", B) the increasing suspicion that the "smooth" rather than "lumpy" distribution of complex psychiatric phenotypes (including fear-circuitry disorders) may in some cases be accounted for by oligogenic (and not necessarily polygenic) transmission, and C) insights from the initial sequence of the chimpanzee genome and comparison with the human genome by the Chimpanzee Sequencing and Analysis Consortium published in late 2005. Neuroevolutionary insights relevant to fear circuitry symptoms that primarily emerge overconsolidationally (especially Combat related Posttraumatic Stress Disorder) are presented. Also introduced is a human-evolution-based principle for clustering innate fear traits. The "Neuroevolutionary Time-depth Principle" of innate fears proposed in this article may be useful in the development of a neuroevolution-based taxonomic re-clustering of stress-triggered and fear-circuitry disorders in DSM-V. Four broad clusters of evolved fear circuits are proposed based on their time-depths: 1) Mesozoic (mammalian-wide) circuits hardwired by wild-type alleles driven to fixation by Mesozoic selective sweeps; 2) Cenozoic (simian-wide) circuits relevant to many specific phobias; 3) mid Paleolithic and upper Paleolithic (Homo sapiens-specific) circuits (arguably resulting mostly from mate-choice-driven stabilizing selection); 4) Neolithic circuits (arguably mostly related to stabilizing selection driven by gene-culture co-evolution). More importantly, the author presents evolutionary perspectives on warzone-related PTSD, Combat-Stress Reaction, Combat-related Stress, Operational-Stress, and other deployment-stress-induced symptoms. The Neuroevolutionary Time-depth Principle presented in this article may help explain the dissimilar stress-resilience levels following different types of acute threat to survival of oneself or one's progency (aka DSM-III and DSM-V PTSD Criterion-A events). PTSD rates following exposure to lethal inter-group violence (combat, warzone exposure or intentionally caused disasters such as terrorism) are usually 5-10 times higher than rates following large-scale natural disasters such as forest fires, floods, hurricanes, volcanic eruptions, and earthquakes. The author predicts that both intentionally-caused large-scale bioevent-disasters, as well as natural bioevents such as SARS and avian flu pandemics will be an exception and are likely to be followed by PTSD rates approaching those that follow warzone exposure. During bioevents, Amygdala-driven and locus-coeruleus-driven epidemic pseudosomatic symptoms may be an order of magnitude more common than infection-caused cytokine-driven symptoms. Implications for the red cross and FEMA are discussed. It is also argued that hospital phobia as well as dog phobia, bird phobia and bat phobia require re-taxonomization in DSM-V in a new "overconsolidational disorders" category anchored around PTSD. The overconsolidational spectrum category may be conceptualized as straddling the fear circuitry spectrum disorders and the affective spectrum disorders categories, and may be a category for which Pitman's secondary prevention propranolol regimen may be specifically indicated as a "morning after pill" intervention. Predictions are presented regarding obsessive-compulsive disorder (OCD) (e.g., female-pattern hoarding vs. male-pattern hoarding) and "culture-bound" acute anxiety symptoms (taijin-kyofusho, koro, shuk yang, shook yong, suo yang, rok-joo, jinjinia-bemar, karoshi, gwarosa, Voodoo death). Also discussed are insights relevant to pseudoneurological symptoms and to the forthcoming Dissociative-Conversive disorders category in DSM-V, including what the author terms fright-triggered acute pseudo-localized symptoms (i.e., pseudoparalysis, pseudocerebellar imbalance, psychogenic blindness, pseudoseizures, and epidemic sociogenic illness). Speculations based on studies of the human abnormal-spindle-like, microcephaly-associated (ASPM) gene, the microcephaly primary autosomal recessive (MCPH) gene, and the forkhead box p2 (FOXP2) gene are made and incorporated into what is termed "The pre-FOXP2 Hypothesis of Blood-Injection-Injury Phobia." Finally, the author argues for a non-reductionistic fusion of "distal (evolutionary) neurobiology" with clinical "proximal neurobiology," utilizing neurological heuristics. It is noted that the value of re-clustering fear traits based on behavioral ethology, human-phylogenomics-derived endophenotypes and on ontogenomics (gene-environment interactions) can be confirmed or disconfirmed using epidemiological or twin studies and psychiatric genomics